1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
4 %struct.A = type { i32, [2 x [2 x i32]], i8, [3 x [3 x [3 x i32]]] }
5 %struct.B = type { i32, [2 x [2 x [2 x %struct.A]]] }
7 @arr = common global [2 x [2 x [2 x [2 x [2 x i32]]]]] zeroinitializer, align 4
8 @A = common global [3 x [3 x %struct.A]] zeroinitializer, align 4
9 @B = common global [2 x [2 x [2 x %struct.B]]] zeroinitializer, align 4
11 define i32* @t1() nounwind {
15 %addr = alloca i32*, align 4
16 store i32* getelementptr inbounds ([2 x [2 x [2 x [2 x [2 x i32]]]]]* @arr, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1), i32** %addr, align 4
17 ; ARM: add r0, r0, #124
18 ; THUMB: adds r0, #124
19 %0 = load i32** %addr, align 4
23 define i32* @t2() nounwind {
27 %addr = alloca i32*, align 4
28 store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2), i32** %addr, align 4
31 ; THUMB: addw r0, r0, #1148
32 %0 = load i32** %addr, align 4
36 define i32* @t3() nounwind {
40 %addr = alloca i32*, align 4
41 store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1), i32** %addr, align 4
42 ; ARM: add r0, r0, #140
43 ; THUMB: adds r0, #140
44 %0 = load i32** %addr, align 4
48 define i32* @t4() nounwind {
52 %addr = alloca i32*, align 4
53 store i32* getelementptr inbounds ([2 x [2 x [2 x %struct.B]]]* @B, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 3, i32 1, i32 2, i32 1), i32** %addr, align 4
54 ; ARM-NOT: movw r{{[0-9]}}, #1060
55 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #4
56 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #132
57 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #24
58 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #36
59 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #24
60 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #4
61 ; ARM: movw r{{[0-9]}}, #1284
62 ; THUMB: addw r{{[0-9]}}, r{{[0-9]}}, #1284
63 %0 = load i32** %addr, align 4