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ARM pop of a single register encodes as post-indexed LDR.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
fast-isel-crash2.ll
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; RUN: llc < %s -O0 -mtriple=thumbv7-apple-darwin
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; rdar://9515076
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; (Make sure this doesn't crash.)
4
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define i32 @test(i32 %i) {
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%t = trunc i32 %i to i4
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%r = sext i4 %t to i32
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ret i32 %r
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}