1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM
2 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
3 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG
4 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG
6 ; Note that some of these tests assume that relocations are either
7 ; movw/movt or constant pool loads. Different platforms will select
8 ; different approaches.
10 @message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
11 @temp = common global [60 x i8] zeroinitializer, align 1
13 define void @t1() nounwind ssp {
15 ; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
16 ; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
21 ; ARM: bl {{_?}}memset
23 ; ARM-LONG: movw r3, :lower16:L_memset$non_lazy_ptr
24 ; ARM-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
25 ; ARM-LONG: ldr r3, [r3]
28 ; THUMB: {{(movw r0, :lower16:_?message1)|(ldr.n r0, .LCPI)}}
29 ; THUMB: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
36 ; THUMB: bl {{_?}}memset
38 ; THUMB-LONG: movw r3, :lower16:L_memset$non_lazy_ptr
39 ; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
40 ; THUMB-LONG: ldr r3, [r3]
42 call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i32 4, i1 false)
46 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
48 define void @t2() nounwind ssp {
50 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
51 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
54 ; ARM: add r0, r0, #16
56 ; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
58 ; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
59 ; ARM: bl {{_?}}memcpy
61 ; ARM-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr
62 ; ARM-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
63 ; ARM-LONG: ldr r3, [r3]
66 ; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
67 ; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
69 ; THUMB: adds r1, r0, #4
73 ; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
75 ; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
76 ; THUMB: bl {{_?}}memcpy
78 ; THUMB-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr
79 ; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
80 ; THUMB-LONG: ldr r3, [r3]
82 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 17, i32 4, i1 false)
86 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
88 define void @t3() nounwind ssp {
90 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
91 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
94 ; ARM: add r0, r0, #16
97 ; ARM: bl {{_?}}memmove
99 ; ARM-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr
100 ; ARM-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
101 ; ARM-LONG: ldr r3, [r3]
104 ; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
105 ; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
106 ; THUMB: ldr r0, [r0]
107 ; THUMB: adds r1, r0, #4
108 ; THUMB: adds r0, #16
109 ; THUMB: movs r2, #10
111 ; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
113 ; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
114 ; THUMB: bl {{_?}}memmove
116 ; THUMB-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr
117 ; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
118 ; THUMB-LONG: ldr r3, [r3]
120 call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
124 define void @t4() nounwind ssp {
126 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
127 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
129 ; ARM: ldr r1, [r0, #16]
130 ; ARM: str r1, [r0, #4]
131 ; ARM: ldr r1, [r0, #20]
132 ; ARM: str r1, [r0, #8]
133 ; ARM: ldrh r1, [r0, #24]
134 ; ARM: strh r1, [r0, #12]
137 ; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
138 ; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
139 ; THUMB: ldr r0, [r0]
140 ; THUMB: ldr r1, [r0, #16]
141 ; THUMB: str r1, [r0, #4]
142 ; THUMB: ldr r1, [r0, #20]
143 ; THUMB: str r1, [r0, #8]
144 ; THUMB: ldrh r1, [r0, #24]
145 ; THUMB: strh r1, [r0, #12]
147 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 4, i1 false)
151 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
153 define void @t5() nounwind ssp {
155 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
156 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
158 ; ARM: ldrh r1, [r0, #16]
159 ; ARM: strh r1, [r0, #4]
160 ; ARM: ldrh r1, [r0, #18]
161 ; ARM: strh r1, [r0, #6]
162 ; ARM: ldrh r1, [r0, #20]
163 ; ARM: strh r1, [r0, #8]
164 ; ARM: ldrh r1, [r0, #22]
165 ; ARM: strh r1, [r0, #10]
166 ; ARM: ldrh r1, [r0, #24]
167 ; ARM: strh r1, [r0, #12]
170 ; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
171 ; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
172 ; THUMB: ldr r0, [r0]
173 ; THUMB: ldrh r1, [r0, #16]
174 ; THUMB: strh r1, [r0, #4]
175 ; THUMB: ldrh r1, [r0, #18]
176 ; THUMB: strh r1, [r0, #6]
177 ; THUMB: ldrh r1, [r0, #20]
178 ; THUMB: strh r1, [r0, #8]
179 ; THUMB: ldrh r1, [r0, #22]
180 ; THUMB: strh r1, [r0, #10]
181 ; THUMB: ldrh r1, [r0, #24]
182 ; THUMB: strh r1, [r0, #12]
184 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 2, i1 false)
188 define void @t6() nounwind ssp {
190 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
191 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
193 ; ARM: ldrb r1, [r0, #16]
194 ; ARM: strb r1, [r0, #4]
195 ; ARM: ldrb r1, [r0, #17]
196 ; ARM: strb r1, [r0, #5]
197 ; ARM: ldrb r1, [r0, #18]
198 ; ARM: strb r1, [r0, #6]
199 ; ARM: ldrb r1, [r0, #19]
200 ; ARM: strb r1, [r0, #7]
201 ; ARM: ldrb r1, [r0, #20]
202 ; ARM: strb r1, [r0, #8]
203 ; ARM: ldrb r1, [r0, #21]
204 ; ARM: strb r1, [r0, #9]
205 ; ARM: ldrb r1, [r0, #22]
206 ; ARM: strb r1, [r0, #10]
207 ; ARM: ldrb r1, [r0, #23]
208 ; ARM: strb r1, [r0, #11]
209 ; ARM: ldrb r1, [r0, #24]
210 ; ARM: strb r1, [r0, #12]
211 ; ARM: ldrb r1, [r0, #25]
212 ; ARM: strb r1, [r0, #13]
215 ; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
216 ; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
217 ; THUMB: ldr r0, [r0]
218 ; THUMB: ldrb r1, [r0, #16]
219 ; THUMB: strb r1, [r0, #4]
220 ; THUMB: ldrb r1, [r0, #17]
221 ; THUMB: strb r1, [r0, #5]
222 ; THUMB: ldrb r1, [r0, #18]
223 ; THUMB: strb r1, [r0, #6]
224 ; THUMB: ldrb r1, [r0, #19]
225 ; THUMB: strb r1, [r0, #7]
226 ; THUMB: ldrb r1, [r0, #20]
227 ; THUMB: strb r1, [r0, #8]
228 ; THUMB: ldrb r1, [r0, #21]
229 ; THUMB: strb r1, [r0, #9]
230 ; THUMB: ldrb r1, [r0, #22]
231 ; THUMB: strb r1, [r0, #10]
232 ; THUMB: ldrb r1, [r0, #23]
233 ; THUMB: strb r1, [r0, #11]
234 ; THUMB: ldrb r1, [r0, #24]
235 ; THUMB: strb r1, [r0, #12]
236 ; THUMB: ldrb r1, [r0, #25]
237 ; THUMB: strb r1, [r0, #13]
239 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
244 define void @t7() nounwind ssp {
245 ; Just make sure this doesn't assert when we have an odd length and an alignment of 2.
246 call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8]* @temp, i32 0, i32 16), i32 3, i32 2, i1 false)
250 define i32 @t8(i32 %x) nounwind {
253 ; ARM-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
255 ; THUMB-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
256 %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
260 declare i32 @llvm.expect.i32(i32, i32) nounwind readnone