1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
4 define zeroext i16 @t1(i16* nocapture %a) nounwind uwtable readonly ssp {
7 %add.ptr = getelementptr inbounds i16* %a, i64 -8
8 %0 = load i16* %add.ptr, align 2
9 ; ARM: ldrh r0, [r0, #-16]
13 define zeroext i16 @t2(i16* nocapture %a) nounwind uwtable readonly ssp {
16 %add.ptr = getelementptr inbounds i16* %a, i64 -16
17 %0 = load i16* %add.ptr, align 2
18 ; ARM: ldrh r0, [r0, #-32]
22 define zeroext i16 @t3(i16* nocapture %a) nounwind uwtable readonly ssp {
25 %add.ptr = getelementptr inbounds i16* %a, i64 -127
26 %0 = load i16* %add.ptr, align 2
27 ; ARM: ldrh r0, [r0, #-254]
31 define zeroext i16 @t4(i16* nocapture %a) nounwind uwtable readonly ssp {
34 %add.ptr = getelementptr inbounds i16* %a, i64 -128
35 %0 = load i16* %add.ptr, align 2
36 ; ARM: mvn r{{[1-9]}}, #255
37 ; ARM: add r0, r0, r{{[1-9]}}
42 define zeroext i16 @t5(i16* nocapture %a) nounwind uwtable readonly ssp {
45 %add.ptr = getelementptr inbounds i16* %a, i64 8
46 %0 = load i16* %add.ptr, align 2
47 ; ARM: ldrh r0, [r0, #16]
51 define zeroext i16 @t6(i16* nocapture %a) nounwind uwtable readonly ssp {
54 %add.ptr = getelementptr inbounds i16* %a, i64 16
55 %0 = load i16* %add.ptr, align 2
56 ; ARM: ldrh r0, [r0, #32]
60 define zeroext i16 @t7(i16* nocapture %a) nounwind uwtable readonly ssp {
63 %add.ptr = getelementptr inbounds i16* %a, i64 127
64 %0 = load i16* %add.ptr, align 2
65 ; ARM: ldrh r0, [r0, #254]
69 define zeroext i16 @t8(i16* nocapture %a) nounwind uwtable readonly ssp {
72 %add.ptr = getelementptr inbounds i16* %a, i64 128
73 %0 = load i16* %add.ptr, align 2
74 ; ARM: add r0, r0, #256
79 define void @t9(i16* nocapture %a) nounwind uwtable ssp {
82 %add.ptr = getelementptr inbounds i16* %a, i64 -8
83 store i16 0, i16* %add.ptr, align 2
84 ; ARM: strh r1, [r0, #-16]
90 define void @t10(i16* nocapture %a) nounwind uwtable ssp {
93 %add.ptr = getelementptr inbounds i16* %a, i64 -128
94 store i16 0, i16* %add.ptr, align 2
95 ; ARM: mvn r{{[1-9]}}, #255
96 ; ARM: add r0, r0, r{{[1-9]}}
97 ; ARM: strh r{{[1-9]}}, [r0]
101 define void @t11(i16* nocapture %a) nounwind uwtable ssp {
104 %add.ptr = getelementptr inbounds i16* %a, i64 8
105 store i16 0, i16* %add.ptr, align 2
106 ; ARM strh r{{[1-9]}}, [r0, #16]
112 define void @t12(i16* nocapture %a) nounwind uwtable ssp {
115 %add.ptr = getelementptr inbounds i16* %a, i64 128
116 store i16 0, i16* %add.ptr, align 2
117 ; ARM: add r0, r0, #256
118 ; ARM: strh r{{[1-9]}}, [r0]
122 define signext i8 @t13(i8* nocapture %a) nounwind uwtable readonly ssp {
125 %add.ptr = getelementptr inbounds i8* %a, i64 -8
126 %0 = load i8* %add.ptr, align 2
127 ; ARM: ldrsb r0, [r0, #-8]
131 define signext i8 @t14(i8* nocapture %a) nounwind uwtable readonly ssp {
134 %add.ptr = getelementptr inbounds i8* %a, i64 -255
135 %0 = load i8* %add.ptr, align 2
136 ; ARM: ldrsb r0, [r0, #-255]
140 define signext i8 @t15(i8* nocapture %a) nounwind uwtable readonly ssp {
143 %add.ptr = getelementptr inbounds i8* %a, i64 -256
144 %0 = load i8* %add.ptr, align 2
145 ; ARM: mvn r{{[1-9]}}, #255
146 ; ARM: add r0, r0, r{{[1-9]}}
147 ; ARM: ldrsb r0, [r0]