1 ; RUN: llvm-as < %s | llc -march=arm
3 define csretcc void %__divsc3({ float, float }* %agg.result, float %a, float %b, float %c, float %d) {
5 br i1 false, label %bb, label %cond_next375
8 %tmp81 = tail call float %copysignf( float 0x7FF0000000000000, float %c ) ; <float> [#uses=1]
9 %tmp87 = mul float %tmp81, %b ; <float> [#uses=1]
10 br label %cond_next375
12 cond_next375: ; preds = %bb, %entry
13 %y.1 = phi float [ %tmp87, %bb ], [ 0.000000e+00, %entry ] ; <float> [#uses=0]
17 declare float %fabsf(float)
19 declare i1 %llvm.isunordered.f32(float, float)
21 declare float %copysignf(float, float)