1 ; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
2 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin > %t
3 ; RUN: FileCheck %s < %t
4 ; RUN: FileCheck %s < %t --check-prefix=CHECK-T2ADDRMODE
10 define i64 @f0(i8* %p) nounwind readonly {
12 %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p)
13 %0 = extractvalue %0 %ldrexd, 1
14 %1 = extractvalue %0 %ldrexd, 0
15 %2 = zext i32 %0 to i64
16 %3 = zext i32 %1 to i64
17 %shl = shl nuw i64 %2, 32
24 define i32 @f1(i8* %ptr, i64 %val) nounwind {
26 %tmp4 = trunc i64 %val to i32
27 %tmp6 = lshr i64 %val, 32
28 %tmp7 = trunc i64 %tmp6 to i32
29 %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
33 declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly
34 declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind
36 ; CHECK-LABEL: test_load_i8:
37 ; CHECK: ldrexb r0, [r0]
39 define i32 @test_load_i8(i8* %addr) {
40 %val = call i32 @llvm.arm.ldrex.p0i8(i8* %addr)
44 ; CHECK-LABEL: test_load_i16:
45 ; CHECK: ldrexh r0, [r0]
47 define i32 @test_load_i16(i16* %addr) {
48 %val = call i32 @llvm.arm.ldrex.p0i16(i16* %addr)
52 ; CHECK-LABEL: test_load_i32:
53 ; CHECK: ldrex r0, [r0]
54 define i32 @test_load_i32(i32* %addr) {
55 %val = call i32 @llvm.arm.ldrex.p0i32(i32* %addr)
59 declare i32 @llvm.arm.ldrex.p0i8(i8*) nounwind readonly
60 declare i32 @llvm.arm.ldrex.p0i16(i16*) nounwind readonly
61 declare i32 @llvm.arm.ldrex.p0i32(i32*) nounwind readonly
63 ; CHECK-LABEL: test_store_i8:
65 ; CHECK: strexb r0, r1, [r2]
66 define i32 @test_store_i8(i32, i8 %val, i8* %addr) {
67 %extval = zext i8 %val to i32
68 %res = call i32 @llvm.arm.strex.p0i8(i32 %extval, i8* %addr)
72 ; CHECK-LABEL: test_store_i16:
74 ; CHECK: strexh r0, r1, [r2]
75 define i32 @test_store_i16(i32, i16 %val, i16* %addr) {
76 %extval = zext i16 %val to i32
77 %res = call i32 @llvm.arm.strex.p0i16(i32 %extval, i16* %addr)
81 ; CHECK-LABEL: test_store_i32:
82 ; CHECK: strex r0, r1, [r2]
83 define i32 @test_store_i32(i32, i32 %val, i32* %addr) {
84 %res = call i32 @llvm.arm.strex.p0i32(i32 %val, i32* %addr)
88 declare i32 @llvm.arm.strex.p0i8(i32, i8*) nounwind
89 declare i32 @llvm.arm.strex.p0i16(i32, i16*) nounwind
90 declare i32 @llvm.arm.strex.p0i32(i32, i32*) nounwind
92 ; CHECK-LABEL: test_clear:
94 define void @test_clear() {
95 call void @llvm.arm.clrex()
99 declare void @llvm.arm.clrex() nounwind
101 @base = global i32* null
103 define void @excl_addrmode() {
104 ; CHECK-T2ADDRMODE-LABEL: excl_addrmode:
105 %base1020 = load i32** @base
106 %offset1020 = getelementptr i32* %base1020, i32 255
107 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1020)
108 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1020)
109 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [{{r[0-9]+}}, #1020]
110 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [{{r[0-9]+}}, #1020]
112 %base1024 = load i32** @base
113 %offset1024 = getelementptr i32* %base1024, i32 256
114 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1024)
115 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1024)
116 ; CHECK-T2ADDRMODE: add.w r[[ADDR:[0-9]+]], {{r[0-9]+}}, #1024
117 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]]
118 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
120 %base1 = load i32** @base
121 %addr8 = bitcast i32* %base1 to i8*
122 %offset1_8 = getelementptr i8* %addr8, i32 1
123 %offset1 = bitcast i8* %offset1_8 to i32*
124 call i32 @llvm.arm.ldrex.p0i32(i32* %offset1)
125 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %offset1)
126 ; CHECK-T2ADDRMODE: adds r[[ADDR:[0-9]+]], #1
127 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]]
128 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
130 %local = alloca i8, i32 1024
131 %local32 = bitcast i8* %local to i32*
132 call i32 @llvm.arm.ldrex.p0i32(i32* %local32)
133 call i32 @llvm.arm.strex.p0i32(i32 0, i32* %local32)
134 ; CHECK-T2ADDRMODE: mov r[[ADDR:[0-9]+]], sp
135 ; CHECK-T2ADDRMODE: ldrex {{r[0-9]+}}, [r[[ADDR]]]
136 ; CHECK-T2ADDRMODE: strex {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]