1 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s -check-prefix=CHECK --check-prefix=CHECK-LE
2 ; RUN: llc -mtriple=armv7-eabi %s -o - | FileCheck %s --check-prefix=CHECK-V7-LE
3 ; RUN: llc -mtriple=armeb-eabi %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
4 ; RUN: llc -mtriple=armebv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK-V7-BE
5 ; Check generated signed and unsigned multiply accumulate long.
7 define i64 @MACLongTest1(i32 %a, i32 %b, i64 %c) {
8 ;CHECK-LABEL: MACLongTest1:
10 %conv = zext i32 %a to i64
11 %conv1 = zext i32 %b to i64
12 %mul = mul i64 %conv1, %conv
13 %add = add i64 %mul, %c
17 define i64 @MACLongTest2(i32 %a, i32 %b, i64 %c) {
18 ;CHECK-LABEL: MACLongTest2:
20 %conv = sext i32 %a to i64
21 %conv1 = sext i32 %b to i64
22 %mul = mul nsw i64 %conv1, %conv
23 %add = add nsw i64 %mul, %c
27 define i64 @MACLongTest3(i32 %a, i32 %b, i32 %c) {
28 ;CHECK-LABEL: MACLongTest3:
30 %conv = zext i32 %b to i64
31 %conv1 = zext i32 %a to i64
32 %mul = mul i64 %conv, %conv1
33 %conv2 = zext i32 %c to i64
34 %add = add i64 %mul, %conv2
38 define i64 @MACLongTest4(i32 %a, i32 %b, i32 %c) {
39 ;CHECK-LABEL: MACLongTest4:
41 %conv = sext i32 %b to i64
42 %conv1 = sext i32 %a to i64
43 %mul = mul nsw i64 %conv, %conv1
44 %conv2 = sext i32 %c to i64
45 %add = add nsw i64 %mul, %conv2
49 ; Two things to check here: the @earlyclobber constraint (on <= v5) and the "$Rd = $R" ones.
50 ; + Without @earlyclobber the v7 code is natural. With it, the first two
51 ; registers must be distinct from the third.
52 ; + Without "$Rd = $R", this can be satisfied without a mov before the umlal
53 ; by trying to use 6 different registers in the MachineInstr. The natural
54 ; evolution of this attempt currently leaves only two movs in the final
55 ; function, both after the umlal. With it, *some* move has to happen
57 define i64 @MACLongTest5(i64 %c, i32 %a, i32 %b) {
58 ; CHECK-V7-LE-LABEL: MACLongTest5:
59 ; CHECK-V7-LE-LABEL: umlal r0, r1, r0, r0
60 ; CHECK-V7-BE-LABEL: MACLongTest5:
61 ; CHECK-V7-BE-LABEL: umlal r1, r0, r1, r1
63 ; CHECK-LABEL: MACLongTest5:
64 ; CHECK-LE: mov [[RDLO:r[0-9]+]], r0
65 ; CHECK-LE: umlal [[RDLO]], r1, r0, r0
66 ; CHECK-LE: mov r0, [[RDLO]]
67 ; CHECK-BE: mov [[RDLO:r[0-9]+]], r1
68 ; CHECK-BE: umlal [[RDLO]], r0, r1, r1
69 ; CHECK-BE: mov r1, [[RDLO]]
71 %conv.trunc = trunc i64 %c to i32
72 %conv = zext i32 %conv.trunc to i64
73 %conv1 = zext i32 %b to i64
74 %mul = mul i64 %conv, %conv
75 %add = add i64 %mul, %c
79 define i64 @MACLongTest6(i32 %a, i32 %b, i32 %c, i32 %d) {
80 ;CHECK-LABEL: MACLongTest6:
81 ;CHECK: smull r12, lr, r1, r0
82 ;CHECK: smlal r12, lr, r3, r2
83 %conv = sext i32 %a to i64
84 %conv1 = sext i32 %b to i64
85 %mul = mul nsw i64 %conv1, %conv
86 %conv2 = sext i32 %c to i64
87 %conv3 = sext i32 %d to i64
88 %mul4 = mul nsw i64 %conv3, %conv2
89 %add = add nsw i64 %mul4, %mul
93 define i64 @MACLongTest7(i64 %acc, i32 %lhs, i32 %rhs) {
94 ;CHECK-LABEL: MACLongTest7:
96 %conv = sext i32 %lhs to i64
97 %conv1 = sext i32 %rhs to i64
98 %mul = mul nsw i64 %conv1, %conv
99 %shl = shl i64 %mul, 32
100 %shr = lshr i64 %mul, 32
101 %or = or i64 %shl, %shr
102 %add = add i64 %or, %acc
106 define i64 @MACLongTest8(i64 %acc, i32 %lhs, i32 %rhs) {
107 ;CHECK-LABEL: MACLongTest8:
109 %conv = zext i32 %lhs to i64
110 %conv1 = zext i32 %rhs to i64
111 %mul = mul nuw i64 %conv1, %conv
112 %and = and i64 %mul, 4294967295
113 %shl = shl i64 %mul, 32
114 %or = or i64 %and, %shl
115 %add = add i64 %or, %acc