It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relat...
[oota-llvm.git] / test / CodeGen / ARM / ret_arg1.ll
1 ; RUN: llvm-as < %s | llc -march=arm
2
3 define i32 @test(i32 %a1) {
4         ret i32 %a1
5 }