1 ; We currently estimate the cost of sext/zext/trunc v8(v16)i32 <-> v8(v16)i8
2 ; instructions as expensive. If lowering is improved the cost model needs to
4 ; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST
8 define void @func_cvt5(%T0_5* %loadaddr, %T1_5* %storeaddr) {
12 %v0 = load %T0_5* %loadaddr
14 ; COST: cost of 3 {{.*}} sext
15 %r = sext %T0_5 %v0 to %T1_5
16 store %T1_5 %r, %T1_5* %storeaddr
19 ;; We currently estimate the cost of this instruction as expensive. If lowering
20 ;; is improved the cost needs to change.
21 %TA0_5 = type <8 x i8>
22 %TA1_5 = type <8 x i32>
24 define void @func_cvt1(%TA0_5* %loadaddr, %TA1_5* %storeaddr) {
28 %v0 = load %TA0_5* %loadaddr
30 ; COST: cost of 3 {{.*}} zext
31 %r = zext %TA0_5 %v0 to %TA1_5
32 store %TA1_5 %r, %TA1_5* %storeaddr
35 ;; We currently estimate the cost of this instruction as expensive. If lowering
36 ;; is improved the cost needs to change.
37 %T0_51 = type <8 x i32>
38 %T1_51 = type <8 x i8>
40 define void @func_cvt51(%T0_51* %loadaddr, %T1_51* %storeaddr) {
49 %v0 = load %T0_51* %loadaddr
51 ; COST: cost of 19 {{.*}} trunc
52 %r = trunc %T0_51 %v0 to %T1_51
53 store %T1_51 %r, %T1_51* %storeaddr
56 ;; We currently estimate the cost of this instruction as expensive. If lowering
57 ;; is improved the cost needs to change.
58 %TT0_5 = type <16 x i8>
59 %TT1_5 = type <16 x i32>
61 define void @func_cvt52(%TT0_5* %loadaddr, %TT1_5* %storeaddr) {
66 %v0 = load %TT0_5* %loadaddr
68 ; COST: cost of 6 {{.*}} sext
69 %r = sext %TT0_5 %v0 to %TT1_5
70 store %TT1_5 %r, %TT1_5* %storeaddr
73 ;; We currently estimate the cost of this instruction as expensive. If lowering
74 ;; is improved the cost needs to change.
75 %TTA0_5 = type <16 x i8>
76 %TTA1_5 = type <16 x i32>
78 define void @func_cvt12(%TTA0_5* %loadaddr, %TTA1_5* %storeaddr) {
83 %v0 = load %TTA0_5* %loadaddr
85 ; COST: cost of 6 {{.*}} zext
86 %r = zext %TTA0_5 %v0 to %TTA1_5
87 store %TTA1_5 %r, %TTA1_5* %storeaddr
90 ;; We currently estimate the cost of this instruction as expensive. If lowering
91 ;; is improved the cost needs to change.
92 %TT0_51 = type <16 x i32>
93 %TT1_51 = type <16 x i8>
95 define void @func_cvt512(%TT0_51* %loadaddr, %TT1_51* %storeaddr) {
112 %v0 = load %TT0_51* %loadaddr
114 ; COST: cost of 38 {{.*}} trunc
115 %r = trunc %TT0_51 %v0 to %TT1_51
116 store %TT1_51 %r, %TT1_51* %storeaddr
120 ; CHECK: sext_v4i16_v4i64:
121 define void @sext_v4i16_v4i64(<4 x i16>* %loadaddr, <4 x i64>* %storeaddr) {
124 %v0 = load <4 x i16>* %loadaddr
125 ; COST: sext_v4i16_v4i64
126 ; COST: cost of 3 {{.*}} sext
127 %r = sext <4 x i16> %v0 to <4 x i64>
128 store <4 x i64> %r, <4 x i64>* %storeaddr
132 ; CHECK: zext_v4i16_v4i64:
133 define void @zext_v4i16_v4i64(<4 x i16>* %loadaddr, <4 x i64>* %storeaddr) {
136 %v0 = load <4 x i16>* %loadaddr
137 ; COST: zext_v4i16_v4i64
138 ; COST: cost of 3 {{.*}} zext
139 %r = zext <4 x i16> %v0 to <4 x i64>
140 store <4 x i64> %r, <4 x i64>* %storeaddr
144 ; CHECK: sext_v8i16_v8i64:
145 define void @sext_v8i16_v8i64(<8 x i16>* %loadaddr, <8 x i64>* %storeaddr) {
150 %v0 = load <8 x i16>* %loadaddr
151 ; COST: sext_v8i16_v8i64
152 ; COST: cost of 6 {{.*}} sext
153 %r = sext <8 x i16> %v0 to <8 x i64>
154 store <8 x i64> %r, <8 x i64>* %storeaddr
158 ; CHECK: zext_v8i16_v8i64:
159 define void @zext_v8i16_v8i64(<8 x i16>* %loadaddr, <8 x i64>* %storeaddr) {
164 %v0 = load <8 x i16>* %loadaddr
165 ; COST: zext_v8i16_v8i64
166 ; COST: cost of 6 {{.*}} zext
167 %r = zext <8 x i16> %v0 to <8 x i64>
168 store <8 x i64> %r, <8 x i64>* %storeaddr