1 ; RUN: llc < %s -march=arm -mattr=+neon,+fp16 | FileCheck %s
3 define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind {
4 ;CHECK-LABEL: vcvt_f32tos32:
6 %tmp1 = load <2 x float>* %A
7 %tmp2 = fptosi <2 x float> %tmp1 to <2 x i32>
11 define <2 x i32> @vcvt_f32tou32(<2 x float>* %A) nounwind {
12 ;CHECK-LABEL: vcvt_f32tou32:
14 %tmp1 = load <2 x float>* %A
15 %tmp2 = fptoui <2 x float> %tmp1 to <2 x i32>
19 define <2 x float> @vcvt_s32tof32(<2 x i32>* %A) nounwind {
20 ;CHECK-LABEL: vcvt_s32tof32:
22 %tmp1 = load <2 x i32>* %A
23 %tmp2 = sitofp <2 x i32> %tmp1 to <2 x float>
27 define <2 x float> @vcvt_u32tof32(<2 x i32>* %A) nounwind {
28 ;CHECK-LABEL: vcvt_u32tof32:
30 %tmp1 = load <2 x i32>* %A
31 %tmp2 = uitofp <2 x i32> %tmp1 to <2 x float>
35 define <4 x i32> @vcvtQ_f32tos32(<4 x float>* %A) nounwind {
36 ;CHECK-LABEL: vcvtQ_f32tos32:
38 %tmp1 = load <4 x float>* %A
39 %tmp2 = fptosi <4 x float> %tmp1 to <4 x i32>
43 define <4 x i32> @vcvtQ_f32tou32(<4 x float>* %A) nounwind {
44 ;CHECK-LABEL: vcvtQ_f32tou32:
46 %tmp1 = load <4 x float>* %A
47 %tmp2 = fptoui <4 x float> %tmp1 to <4 x i32>
51 define <4 x float> @vcvtQ_s32tof32(<4 x i32>* %A) nounwind {
52 ;CHECK-LABEL: vcvtQ_s32tof32:
54 %tmp1 = load <4 x i32>* %A
55 %tmp2 = sitofp <4 x i32> %tmp1 to <4 x float>
59 define <4 x float> @vcvtQ_u32tof32(<4 x i32>* %A) nounwind {
60 ;CHECK-LABEL: vcvtQ_u32tof32:
62 %tmp1 = load <4 x i32>* %A
63 %tmp2 = uitofp <4 x i32> %tmp1 to <4 x float>
67 define <2 x i32> @vcvt_n_f32tos32(<2 x float>* %A) nounwind {
68 ;CHECK-LABEL: vcvt_n_f32tos32:
70 %tmp1 = load <2 x float>* %A
71 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1)
75 define <2 x i32> @vcvt_n_f32tou32(<2 x float>* %A) nounwind {
76 ;CHECK-LABEL: vcvt_n_f32tou32:
78 %tmp1 = load <2 x float>* %A
79 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1)
83 define <2 x float> @vcvt_n_s32tof32(<2 x i32>* %A) nounwind {
84 ;CHECK-LABEL: vcvt_n_s32tof32:
86 %tmp1 = load <2 x i32>* %A
87 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
91 define <2 x float> @vcvt_n_u32tof32(<2 x i32>* %A) nounwind {
92 ;CHECK-LABEL: vcvt_n_u32tof32:
94 %tmp1 = load <2 x i32>* %A
95 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
99 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone
100 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone
101 declare <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
102 declare <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
104 define <4 x i32> @vcvtQ_n_f32tos32(<4 x float>* %A) nounwind {
105 ;CHECK-LABEL: vcvtQ_n_f32tos32:
107 %tmp1 = load <4 x float>* %A
108 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float> %tmp1, i32 1)
112 define <4 x i32> @vcvtQ_n_f32tou32(<4 x float>* %A) nounwind {
113 ;CHECK-LABEL: vcvtQ_n_f32tou32:
115 %tmp1 = load <4 x float>* %A
116 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float> %tmp1, i32 1)
120 define <4 x float> @vcvtQ_n_s32tof32(<4 x i32>* %A) nounwind {
121 ;CHECK-LABEL: vcvtQ_n_s32tof32:
123 %tmp1 = load <4 x i32>* %A
124 %tmp2 = call <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32> %tmp1, i32 1)
125 ret <4 x float> %tmp2
128 define <4 x float> @vcvtQ_n_u32tof32(<4 x i32>* %A) nounwind {
129 ;CHECK-LABEL: vcvtQ_n_u32tof32:
131 %tmp1 = load <4 x i32>* %A
132 %tmp2 = call <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32> %tmp1, i32 1)
133 ret <4 x float> %tmp2
136 declare <4 x i32> @llvm.arm.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float>, i32) nounwind readnone
137 declare <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwind readnone
138 declare <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone
139 declare <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone
141 define <4 x float> @vcvt_f16tof32(<4 x i16>* %A) nounwind {
142 ;CHECK-LABEL: vcvt_f16tof32:
144 %tmp1 = load <4 x i16>* %A
145 %tmp2 = call <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16> %tmp1)
146 ret <4 x float> %tmp2
149 define <4 x i16> @vcvt_f32tof16(<4 x float>* %A) nounwind {
150 ;CHECK-LABEL: vcvt_f32tof16:
152 %tmp1 = load <4 x float>* %A
153 %tmp2 = call <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float> %tmp1)
157 declare <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16>) nounwind readnone
158 declare <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float>) nounwind readnone
161 define <4 x i16> @fix_float_to_i16(<4 x float> %in) {
162 ; CHECK-LABEL: fix_float_to_i16:
163 ; CHECK: vcvt.u32.f32 [[TMP:q[0-9]+]], {{q[0-9]+}}, #1
164 ; CHECK: vmovn.i32 {{d[0-9]+}}, [[TMP]]
166 %scale = fmul <4 x float> %in, <float 2.0, float 2.0, float 2.0, float 2.0>
167 %conv = fptoui <4 x float> %scale to <4 x i16>
171 define <2 x i64> @fix_float_to_i64(<2 x float> %in) {
172 ; CHECK-LABEL: fix_float_to_i64:
176 %scale = fmul <2 x float> %in, <float 2.0, float 2.0>
177 %conv = fptoui <2 x float> %scale to <2 x i64>
181 define <4 x i16> @fix_double_to_i16(<4 x double> %in) {
182 ; CHECK-LABEL: fix_double_to_i16:
183 ; CHECK: vcvt.s32.f64
184 ; CHECK: vcvt.s32.f64
186 %scale = fmul <4 x double> %in, <double 2.0, double 2.0, double 2.0, double 2.0>
187 %conv = fptoui <4 x double> %scale to <4 x i16>
191 define <2 x i64> @fix_double_to_i64(<2 x double> %in) {
192 ; CHECK-LABEL: fix_double_to_i64:
195 %scale = fmul <2 x double> %in, <double 2.0, double 2.0>
196 %conv = fptoui <2 x double> %scale to <2 x i64>