1 ; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
3 define <8 x i8> @vld1i8(i8* %A) nounwind {
6 %tmp1 = call <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8* %A)
10 define <4 x i16> @vld1i16(i16* %A) nounwind {
13 %tmp1 = call <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16* %A)
17 define <2 x i32> @vld1i32(i32* %A) nounwind {
20 %tmp1 = call <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32* %A)
24 define <2 x float> @vld1f(float* %A) nounwind {
27 %tmp1 = call <2 x float> @llvm.arm.neon.vld1f.v2f32(float* %A)
31 define <1 x i64> @vld1i64(i64* %A) nounwind {
34 %tmp1 = call <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64* %A)
38 define <16 x i8> @vld1Qi8(i8* %A) nounwind {
41 %tmp1 = call <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8* %A)
45 define <8 x i16> @vld1Qi16(i16* %A) nounwind {
48 %tmp1 = call <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16* %A)
52 define <4 x i32> @vld1Qi32(i32* %A) nounwind {
55 %tmp1 = call <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32* %A)
59 define <4 x float> @vld1Qf(float* %A) nounwind {
62 %tmp1 = call <4 x float> @llvm.arm.neon.vld1f.v4f32(float* %A)
66 define <2 x i64> @vld1Qi64(i64* %A) nounwind {
69 %tmp1 = call <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64* %A)
73 declare <8 x i8> @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readnone
74 declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16*) nounwind readnone
75 declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32*) nounwind readnone
76 declare <2 x float> @llvm.arm.neon.vld1f.v2f32(float*) nounwind readnone
77 declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64*) nounwind readnone
79 declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readnone
80 declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16*) nounwind readnone
81 declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32*) nounwind readnone
82 declare <4 x float> @llvm.arm.neon.vld1f.v4f32(float*) nounwind readnone
83 declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64*) nounwind readnone