1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
4 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
5 %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
6 %struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
8 %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
9 %struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
10 %struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
12 define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
14 ;Check the alignment value. Max for this instruction is 16 bits:
15 ;CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16]
16 %tmp1 = load <8 x i8>* %B
17 %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
18 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
19 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
20 %tmp5 = add <8 x i8> %tmp3, %tmp4
24 define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind {
26 ;Check the alignment value. Max for this instruction is 32 bits:
27 ;CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32]
28 %tmp0 = bitcast i16* %A to i8*
29 %tmp1 = load <4 x i16>* %B
30 %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
31 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0
32 %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1
33 %tmp5 = add <4 x i16> %tmp3, %tmp4
37 define <2 x i32> @vld2lanei32(i32* %A, <2 x i32>* %B) nounwind {
40 %tmp0 = bitcast i32* %A to i8*
41 %tmp1 = load <2 x i32>* %B
42 %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
43 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0
44 %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1
45 %tmp5 = add <2 x i32> %tmp3, %tmp4
49 define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind {
52 %tmp0 = bitcast float* %A to i8*
53 %tmp1 = load <2 x float>* %B
54 %tmp2 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
55 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 0
56 %tmp4 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 1
57 %tmp5 = fadd <2 x float> %tmp3, %tmp4
61 define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
63 ;Check the (default) alignment.
64 ;CHECK: vld2.16 {d17[1], d19[1]}, [r0]
65 %tmp0 = bitcast i16* %A to i8*
66 %tmp1 = load <8 x i16>* %B
67 %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
68 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0
69 %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1
70 %tmp5 = add <8 x i16> %tmp3, %tmp4
74 define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
76 ;Check the alignment value. Max for this instruction is 64 bits:
77 ;CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64]
78 %tmp0 = bitcast i32* %A to i8*
79 %tmp1 = load <4 x i32>* %B
80 %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
81 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0
82 %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1
83 %tmp5 = add <4 x i32> %tmp3, %tmp4
87 define <4 x float> @vld2laneQf(float* %A, <4 x float>* %B) nounwind {
90 %tmp0 = bitcast float* %A to i8*
91 %tmp1 = load <4 x float>* %B
92 %tmp2 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
93 %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 0
94 %tmp4 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 1
95 %tmp5 = fadd <4 x float> %tmp3, %tmp4
99 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
100 declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
101 declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
102 declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind readonly
104 declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
105 declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
106 declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind readonly
108 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
109 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
110 %struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
111 %struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> }
113 %struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
114 %struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
115 %struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> }
117 define <8 x i8> @vld3lanei8(i8* %A, <8 x i8>* %B) nounwind {
120 %tmp1 = load <8 x i8>* %B
121 %tmp2 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
122 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
123 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
124 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
125 %tmp6 = add <8 x i8> %tmp3, %tmp4
126 %tmp7 = add <8 x i8> %tmp5, %tmp6
130 define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind {
132 ;Check the (default) alignment value. VLD3 does not support alignment.
133 ;CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0]
134 %tmp0 = bitcast i16* %A to i8*
135 %tmp1 = load <4 x i16>* %B
136 %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
137 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0
138 %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1
139 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2
140 %tmp6 = add <4 x i16> %tmp3, %tmp4
141 %tmp7 = add <4 x i16> %tmp5, %tmp6
145 define <2 x i32> @vld3lanei32(i32* %A, <2 x i32>* %B) nounwind {
148 %tmp0 = bitcast i32* %A to i8*
149 %tmp1 = load <2 x i32>* %B
150 %tmp2 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
151 %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 0
152 %tmp4 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 1
153 %tmp5 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 2
154 %tmp6 = add <2 x i32> %tmp3, %tmp4
155 %tmp7 = add <2 x i32> %tmp5, %tmp6
159 define <2 x float> @vld3lanef(float* %A, <2 x float>* %B) nounwind {
162 %tmp0 = bitcast float* %A to i8*
163 %tmp1 = load <2 x float>* %B
164 %tmp2 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
165 %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 0
166 %tmp4 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 1
167 %tmp5 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 2
168 %tmp6 = fadd <2 x float> %tmp3, %tmp4
169 %tmp7 = fadd <2 x float> %tmp5, %tmp6
170 ret <2 x float> %tmp7
173 define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
174 ;CHECK: vld3laneQi16:
175 ;Check the (default) alignment value. VLD3 does not support alignment.
176 ;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0]
177 %tmp0 = bitcast i16* %A to i8*
178 %tmp1 = load <8 x i16>* %B
179 %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8)
180 %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
181 %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
182 %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
183 %tmp6 = add <8 x i16> %tmp3, %tmp4
184 %tmp7 = add <8 x i16> %tmp5, %tmp6
188 define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
189 ;CHECK: vld3laneQi32:
191 %tmp0 = bitcast i32* %A to i8*
192 %tmp1 = load <4 x i32>* %B
193 %tmp2 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 3, i32 1)
194 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 0
195 %tmp4 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 1
196 %tmp5 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 2
197 %tmp6 = add <4 x i32> %tmp3, %tmp4
198 %tmp7 = add <4 x i32> %tmp5, %tmp6
202 define <4 x float> @vld3laneQf(float* %A, <4 x float>* %B) nounwind {
205 %tmp0 = bitcast float* %A to i8*
206 %tmp1 = load <4 x float>* %B
207 %tmp2 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
208 %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 0
209 %tmp4 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 1
210 %tmp5 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 2
211 %tmp6 = fadd <4 x float> %tmp3, %tmp4
212 %tmp7 = fadd <4 x float> %tmp5, %tmp6
213 ret <4 x float> %tmp7
216 declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
217 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
218 declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
219 declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly
221 declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
222 declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
223 declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly
225 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
226 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
227 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
228 %struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
230 %struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
231 %struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
232 %struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
234 define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind {
236 ;Check the alignment value. Max for this instruction is 32 bits:
237 ;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
238 %tmp1 = load <8 x i8>* %B
239 %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
240 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
241 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
242 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
243 %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
244 %tmp7 = add <8 x i8> %tmp3, %tmp4
245 %tmp8 = add <8 x i8> %tmp5, %tmp6
246 %tmp9 = add <8 x i8> %tmp7, %tmp8
250 define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind {
253 %tmp0 = bitcast i16* %A to i8*
254 %tmp1 = load <4 x i16>* %B
255 %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
256 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0
257 %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1
258 %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2
259 %tmp6 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 3
260 %tmp7 = add <4 x i16> %tmp3, %tmp4
261 %tmp8 = add <4 x i16> %tmp5, %tmp6
262 %tmp9 = add <4 x i16> %tmp7, %tmp8
266 define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind {
268 ;Check the alignment value. Max for this instruction is 128 bits:
269 ;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
270 %tmp0 = bitcast i32* %A to i8*
271 %tmp1 = load <2 x i32>* %B
272 %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
273 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0
274 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1
275 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2
276 %tmp6 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 3
277 %tmp7 = add <2 x i32> %tmp3, %tmp4
278 %tmp8 = add <2 x i32> %tmp5, %tmp6
279 %tmp9 = add <2 x i32> %tmp7, %tmp8
283 define <2 x float> @vld4lanef(float* %A, <2 x float>* %B) nounwind {
286 %tmp0 = bitcast float* %A to i8*
287 %tmp1 = load <2 x float>* %B
288 %tmp2 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
289 %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 0
290 %tmp4 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 1
291 %tmp5 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 2
292 %tmp6 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 3
293 %tmp7 = fadd <2 x float> %tmp3, %tmp4
294 %tmp8 = fadd <2 x float> %tmp5, %tmp6
295 %tmp9 = fadd <2 x float> %tmp7, %tmp8
296 ret <2 x float> %tmp9
299 define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
300 ;CHECK: vld4laneQi16:
301 ;Check the alignment value. Max for this instruction is 64 bits:
302 ;CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64]
303 %tmp0 = bitcast i16* %A to i8*
304 %tmp1 = load <8 x i16>* %B
305 %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 16)
306 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0
307 %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1
308 %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2
309 %tmp6 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 3
310 %tmp7 = add <8 x i16> %tmp3, %tmp4
311 %tmp8 = add <8 x i16> %tmp5, %tmp6
312 %tmp9 = add <8 x i16> %tmp7, %tmp8
316 define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
317 ;CHECK: vld4laneQi32:
318 ;Check the (default) alignment.
319 ;CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
320 %tmp0 = bitcast i32* %A to i8*
321 %tmp1 = load <4 x i32>* %B
322 %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
323 %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0
324 %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1
325 %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2
326 %tmp6 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 3
327 %tmp7 = add <4 x i32> %tmp3, %tmp4
328 %tmp8 = add <4 x i32> %tmp5, %tmp6
329 %tmp9 = add <4 x i32> %tmp7, %tmp8
333 define <4 x float> @vld4laneQf(float* %A, <4 x float>* %B) nounwind {
336 %tmp0 = bitcast float* %A to i8*
337 %tmp1 = load <4 x float>* %B
338 %tmp2 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
339 %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 0
340 %tmp4 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 1
341 %tmp5 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 2
342 %tmp6 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 3
343 %tmp7 = fadd <4 x float> %tmp3, %tmp4
344 %tmp8 = fadd <4 x float> %tmp5, %tmp6
345 %tmp9 = fadd <4 x float> %tmp7, %tmp8
346 ret <4 x float> %tmp9
349 declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
350 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
351 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
352 declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly
354 declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
355 declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
356 declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly