1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define <8 x i8> @vld1lanei8(i8* %A, <8 x i8>* %B) nounwind {
5 ;CHECK: vld1.8 {d16[3]}, [r0]
6 %tmp1 = load <8 x i8>* %B
7 %tmp2 = load i8* %A, align 1
8 %tmp3 = insertelement <8 x i8> %tmp1, i8 %tmp2, i32 3
12 define <4 x i16> @vld1lanei16(i16* %A, <4 x i16>* %B) nounwind {
14 ;CHECK: vld1.16 {d16[2]}, [r0]
15 %tmp1 = load <4 x i16>* %B
16 %tmp2 = load i16* %A, align 2
17 %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 2
21 define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind {
23 ;CHECK: vld1.32 {d16[1]}, [r0]
24 %tmp1 = load <2 x i32>* %B
25 %tmp2 = load i32* %A, align 4
26 %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1
30 define <16 x i8> @vld1laneQi8(i8* %A, <16 x i8>* %B) nounwind {
32 ;CHECK: vld1.8 {d17[1]}, [r0]
33 %tmp1 = load <16 x i8>* %B
34 %tmp2 = load i8* %A, align 1
35 %tmp3 = insertelement <16 x i8> %tmp1, i8 %tmp2, i32 9
39 define <8 x i16> @vld1laneQi16(i16* %A, <8 x i16>* %B) nounwind {
41 ;CHECK: vld1.16 {d17[1]}, [r0]
42 %tmp1 = load <8 x i16>* %B
43 %tmp2 = load i16* %A, align 2
44 %tmp3 = insertelement <8 x i16> %tmp1, i16 %tmp2, i32 5
48 define <4 x i32> @vld1laneQi32(i32* %A, <4 x i32>* %B) nounwind {
50 ;CHECK: vld1.32 {d17[1]}, [r0]
51 %tmp1 = load <4 x i32>* %B
52 %tmp2 = load i32* %A, align 4
53 %tmp3 = insertelement <4 x i32> %tmp1, i32 %tmp2, i32 3
57 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
58 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
59 %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
60 %struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
62 %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
63 %struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
64 %struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
66 define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
68 ;Check the alignment value. Max for this instruction is 16 bits:
69 ;CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16]
70 %tmp1 = load <8 x i8>* %B
71 %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
72 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
73 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
74 %tmp5 = add <8 x i8> %tmp3, %tmp4
78 define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind {
80 ;Check the alignment value. Max for this instruction is 32 bits:
81 ;CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32]
82 %tmp0 = bitcast i16* %A to i8*
83 %tmp1 = load <4 x i16>* %B
84 %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
85 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0
86 %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1
87 %tmp5 = add <4 x i16> %tmp3, %tmp4
91 define <2 x i32> @vld2lanei32(i32* %A, <2 x i32>* %B) nounwind {
94 %tmp0 = bitcast i32* %A to i8*
95 %tmp1 = load <2 x i32>* %B
96 %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
97 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0
98 %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1
99 %tmp5 = add <2 x i32> %tmp3, %tmp4
103 define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind {
106 %tmp0 = bitcast float* %A to i8*
107 %tmp1 = load <2 x float>* %B
108 %tmp2 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
109 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 0
110 %tmp4 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 1
111 %tmp5 = fadd <2 x float> %tmp3, %tmp4
112 ret <2 x float> %tmp5
115 define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
116 ;CHECK: vld2laneQi16:
117 ;Check the (default) alignment.
118 ;CHECK: vld2.16 {d17[1], d19[1]}, [r0]
119 %tmp0 = bitcast i16* %A to i8*
120 %tmp1 = load <8 x i16>* %B
121 %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
122 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0
123 %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1
124 %tmp5 = add <8 x i16> %tmp3, %tmp4
128 define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
129 ;CHECK: vld2laneQi32:
130 ;Check the alignment value. Max for this instruction is 64 bits:
131 ;CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64]
132 %tmp0 = bitcast i32* %A to i8*
133 %tmp1 = load <4 x i32>* %B
134 %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
135 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0
136 %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1
137 %tmp5 = add <4 x i32> %tmp3, %tmp4
141 define <4 x float> @vld2laneQf(float* %A, <4 x float>* %B) nounwind {
144 %tmp0 = bitcast float* %A to i8*
145 %tmp1 = load <4 x float>* %B
146 %tmp2 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
147 %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 0
148 %tmp4 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 1
149 %tmp5 = fadd <4 x float> %tmp3, %tmp4
150 ret <4 x float> %tmp5
153 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
154 declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
155 declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
156 declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind readonly
158 declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
159 declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
160 declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind readonly
162 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
163 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
164 %struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
165 %struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> }
167 %struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
168 %struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
169 %struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> }
171 define <8 x i8> @vld3lanei8(i8* %A, <8 x i8>* %B) nounwind {
174 %tmp1 = load <8 x i8>* %B
175 %tmp2 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
176 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
177 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
178 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
179 %tmp6 = add <8 x i8> %tmp3, %tmp4
180 %tmp7 = add <8 x i8> %tmp5, %tmp6
184 define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind {
186 ;Check the (default) alignment value. VLD3 does not support alignment.
187 ;CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0]
188 %tmp0 = bitcast i16* %A to i8*
189 %tmp1 = load <4 x i16>* %B
190 %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
191 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0
192 %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1
193 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2
194 %tmp6 = add <4 x i16> %tmp3, %tmp4
195 %tmp7 = add <4 x i16> %tmp5, %tmp6
199 define <2 x i32> @vld3lanei32(i32* %A, <2 x i32>* %B) nounwind {
202 %tmp0 = bitcast i32* %A to i8*
203 %tmp1 = load <2 x i32>* %B
204 %tmp2 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
205 %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 0
206 %tmp4 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 1
207 %tmp5 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 2
208 %tmp6 = add <2 x i32> %tmp3, %tmp4
209 %tmp7 = add <2 x i32> %tmp5, %tmp6
213 define <2 x float> @vld3lanef(float* %A, <2 x float>* %B) nounwind {
216 %tmp0 = bitcast float* %A to i8*
217 %tmp1 = load <2 x float>* %B
218 %tmp2 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
219 %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 0
220 %tmp4 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 1
221 %tmp5 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 2
222 %tmp6 = fadd <2 x float> %tmp3, %tmp4
223 %tmp7 = fadd <2 x float> %tmp5, %tmp6
224 ret <2 x float> %tmp7
227 define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
228 ;CHECK: vld3laneQi16:
229 ;Check the (default) alignment value. VLD3 does not support alignment.
230 ;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0]
231 %tmp0 = bitcast i16* %A to i8*
232 %tmp1 = load <8 x i16>* %B
233 %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8)
234 %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
235 %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
236 %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
237 %tmp6 = add <8 x i16> %tmp3, %tmp4
238 %tmp7 = add <8 x i16> %tmp5, %tmp6
242 define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
243 ;CHECK: vld3laneQi32:
245 %tmp0 = bitcast i32* %A to i8*
246 %tmp1 = load <4 x i32>* %B
247 %tmp2 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 3, i32 1)
248 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 0
249 %tmp4 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 1
250 %tmp5 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 2
251 %tmp6 = add <4 x i32> %tmp3, %tmp4
252 %tmp7 = add <4 x i32> %tmp5, %tmp6
256 define <4 x float> @vld3laneQf(float* %A, <4 x float>* %B) nounwind {
259 %tmp0 = bitcast float* %A to i8*
260 %tmp1 = load <4 x float>* %B
261 %tmp2 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
262 %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 0
263 %tmp4 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 1
264 %tmp5 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 2
265 %tmp6 = fadd <4 x float> %tmp3, %tmp4
266 %tmp7 = fadd <4 x float> %tmp5, %tmp6
267 ret <4 x float> %tmp7
270 declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
271 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
272 declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
273 declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly
275 declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
276 declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
277 declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly
279 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
280 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
281 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
282 %struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
284 %struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
285 %struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
286 %struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
288 define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind {
290 ;Check the alignment value. Max for this instruction is 32 bits:
291 ;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
292 %tmp1 = load <8 x i8>* %B
293 %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
294 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
295 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
296 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
297 %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
298 %tmp7 = add <8 x i8> %tmp3, %tmp4
299 %tmp8 = add <8 x i8> %tmp5, %tmp6
300 %tmp9 = add <8 x i8> %tmp7, %tmp8
304 define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind {
307 %tmp0 = bitcast i16* %A to i8*
308 %tmp1 = load <4 x i16>* %B
309 %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
310 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0
311 %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1
312 %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2
313 %tmp6 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 3
314 %tmp7 = add <4 x i16> %tmp3, %tmp4
315 %tmp8 = add <4 x i16> %tmp5, %tmp6
316 %tmp9 = add <4 x i16> %tmp7, %tmp8
320 define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind {
322 ;Check the alignment value. Max for this instruction is 128 bits:
323 ;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
324 %tmp0 = bitcast i32* %A to i8*
325 %tmp1 = load <2 x i32>* %B
326 %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
327 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0
328 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1
329 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2
330 %tmp6 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 3
331 %tmp7 = add <2 x i32> %tmp3, %tmp4
332 %tmp8 = add <2 x i32> %tmp5, %tmp6
333 %tmp9 = add <2 x i32> %tmp7, %tmp8
337 define <2 x float> @vld4lanef(float* %A, <2 x float>* %B) nounwind {
340 %tmp0 = bitcast float* %A to i8*
341 %tmp1 = load <2 x float>* %B
342 %tmp2 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
343 %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 0
344 %tmp4 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 1
345 %tmp5 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 2
346 %tmp6 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 3
347 %tmp7 = fadd <2 x float> %tmp3, %tmp4
348 %tmp8 = fadd <2 x float> %tmp5, %tmp6
349 %tmp9 = fadd <2 x float> %tmp7, %tmp8
350 ret <2 x float> %tmp9
353 define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
354 ;CHECK: vld4laneQi16:
355 ;Check the alignment value. Max for this instruction is 64 bits:
356 ;CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64]
357 %tmp0 = bitcast i16* %A to i8*
358 %tmp1 = load <8 x i16>* %B
359 %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 16)
360 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0
361 %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1
362 %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2
363 %tmp6 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 3
364 %tmp7 = add <8 x i16> %tmp3, %tmp4
365 %tmp8 = add <8 x i16> %tmp5, %tmp6
366 %tmp9 = add <8 x i16> %tmp7, %tmp8
370 define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
371 ;CHECK: vld4laneQi32:
372 ;Check the (default) alignment.
373 ;CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
374 %tmp0 = bitcast i32* %A to i8*
375 %tmp1 = load <4 x i32>* %B
376 %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
377 %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0
378 %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1
379 %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2
380 %tmp6 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 3
381 %tmp7 = add <4 x i32> %tmp3, %tmp4
382 %tmp8 = add <4 x i32> %tmp5, %tmp6
383 %tmp9 = add <4 x i32> %tmp7, %tmp8
387 define <4 x float> @vld4laneQf(float* %A, <4 x float>* %B) nounwind {
390 %tmp0 = bitcast float* %A to i8*
391 %tmp1 = load <4 x float>* %B
392 %tmp2 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
393 %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 0
394 %tmp4 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 1
395 %tmp5 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 2
396 %tmp6 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 3
397 %tmp7 = fadd <4 x float> %tmp3, %tmp4
398 %tmp8 = fadd <4 x float> %tmp5, %tmp6
399 %tmp9 = fadd <4 x float> %tmp7, %tmp8
400 ret <4 x float> %tmp9
403 declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
404 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
405 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
406 declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly
408 declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
409 declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
410 declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly