1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind {
5 ;Check the (default) alignment.
6 ;CHECK: vst1.8 {d16[3]}, [r0]
7 %tmp1 = load <8 x i8>* %B
8 %tmp2 = extractelement <8 x i8> %tmp1, i32 3
9 store i8 %tmp2, i8* %A, align 8
13 define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind {
15 ;Check the alignment value. Max for this instruction is 16 bits:
16 ;CHECK: vst1.16 {d16[2]}, [r0, :16]
17 %tmp1 = load <4 x i16>* %B
18 %tmp2 = extractelement <4 x i16> %tmp1, i32 2
19 store i16 %tmp2, i16* %A, align 8
23 define void @vst1lanei32(i32* %A, <2 x i32>* %B) nounwind {
25 ;Check the alignment value. Max for this instruction is 32 bits:
26 ;CHECK: vst1.32 {d16[1]}, [r0, :32]
27 %tmp1 = load <2 x i32>* %B
28 %tmp2 = extractelement <2 x i32> %tmp1, i32 1
29 store i32 %tmp2, i32* %A, align 8
33 define void @vst1lanef(float* %A, <2 x float>* %B) nounwind {
35 ;CHECK: vst1.32 {d16[1]}, [r0]
36 %tmp1 = load <2 x float>* %B
37 %tmp2 = extractelement <2 x float> %tmp1, i32 1
38 store float %tmp2, float* %A
42 define void @vst1laneQi8(i8* %A, <16 x i8>* %B) nounwind {
44 ;CHECK: vst1.8 {d17[1]}, [r0]
45 %tmp1 = load <16 x i8>* %B
46 %tmp2 = extractelement <16 x i8> %tmp1, i32 9
47 store i8 %tmp2, i8* %A, align 8
51 define void @vst1laneQi16(i16* %A, <8 x i16>* %B) nounwind {
53 ;CHECK: vst1.16 {d17[1]}, [r0, :16]
54 %tmp1 = load <8 x i16>* %B
55 %tmp2 = extractelement <8 x i16> %tmp1, i32 5
56 store i16 %tmp2, i16* %A, align 8
60 define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind {
62 ;CHECK: vst1.32 {d17[1]}, [r0, :32]
63 %tmp1 = load <4 x i32>* %B
64 %tmp2 = extractelement <4 x i32> %tmp1, i32 3
65 store i32 %tmp2, i32* %A, align 8
69 define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind {
71 ;CHECK: vst1.32 {d17[1]}, [r0]
72 %tmp1 = load <4 x float>* %B
73 %tmp2 = extractelement <4 x float> %tmp1, i32 3
74 store float %tmp2, float* %A
78 define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
80 ;Check the alignment value. Max for this instruction is 16 bits:
81 ;CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16]
82 %tmp1 = load <8 x i8>* %B
83 call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
87 define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind {
89 ;Check the alignment value. Max for this instruction is 32 bits:
90 ;CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32]
91 %tmp0 = bitcast i16* %A to i8*
92 %tmp1 = load <4 x i16>* %B
93 call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
97 define void @vst2lanei32(i32* %A, <2 x i32>* %B) nounwind {
100 %tmp0 = bitcast i32* %A to i8*
101 %tmp1 = load <2 x i32>* %B
102 call void @llvm.arm.neon.vst2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
106 define void @vst2lanef(float* %A, <2 x float>* %B) nounwind {
109 %tmp0 = bitcast float* %A to i8*
110 %tmp1 = load <2 x float>* %B
111 call void @llvm.arm.neon.vst2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
115 define void @vst2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
116 ;CHECK: vst2laneQi16:
117 ;Check the (default) alignment.
118 ;CHECK: vst2.16 {d17[1], d19[1]}, [r0]
119 %tmp0 = bitcast i16* %A to i8*
120 %tmp1 = load <8 x i16>* %B
121 call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
125 define void @vst2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
126 ;CHECK: vst2laneQi32:
127 ;Check the alignment value. Max for this instruction is 64 bits:
128 ;CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64]
129 %tmp0 = bitcast i32* %A to i8*
130 %tmp1 = load <4 x i32>* %B
131 call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
135 define void @vst2laneQf(float* %A, <4 x float>* %B) nounwind {
138 %tmp0 = bitcast float* %A to i8*
139 %tmp1 = load <4 x float>* %B
140 call void @llvm.arm.neon.vst2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 3, i32 1)
144 declare void @llvm.arm.neon.vst2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind
145 declare void @llvm.arm.neon.vst2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind
146 declare void @llvm.arm.neon.vst2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind
147 declare void @llvm.arm.neon.vst2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind
149 declare void @llvm.arm.neon.vst2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind
150 declare void @llvm.arm.neon.vst2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind
151 declare void @llvm.arm.neon.vst2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind
153 define void @vst3lanei8(i8* %A, <8 x i8>* %B) nounwind {
156 %tmp1 = load <8 x i8>* %B
157 call void @llvm.arm.neon.vst3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
161 define void @vst3lanei16(i16* %A, <4 x i16>* %B) nounwind {
163 ;Check the (default) alignment value. VST3 does not support alignment.
164 ;CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0]
165 %tmp0 = bitcast i16* %A to i8*
166 %tmp1 = load <4 x i16>* %B
167 call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
171 define void @vst3lanei32(i32* %A, <2 x i32>* %B) nounwind {
174 %tmp0 = bitcast i32* %A to i8*
175 %tmp1 = load <2 x i32>* %B
176 call void @llvm.arm.neon.vst3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
180 define void @vst3lanef(float* %A, <2 x float>* %B) nounwind {
183 %tmp0 = bitcast float* %A to i8*
184 %tmp1 = load <2 x float>* %B
185 call void @llvm.arm.neon.vst3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
189 define void @vst3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
190 ;CHECK: vst3laneQi16:
191 ;Check the (default) alignment value. VST3 does not support alignment.
192 ;CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0]
193 %tmp0 = bitcast i16* %A to i8*
194 %tmp1 = load <8 x i16>* %B
195 call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 8)
199 define void @vst3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
200 ;CHECK: vst3laneQi32:
202 %tmp0 = bitcast i32* %A to i8*
203 %tmp1 = load <4 x i32>* %B
204 call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1)
208 define void @vst3laneQf(float* %A, <4 x float>* %B) nounwind {
211 %tmp0 = bitcast float* %A to i8*
212 %tmp1 = load <4 x float>* %B
213 call void @llvm.arm.neon.vst3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
217 declare void @llvm.arm.neon.vst3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind
218 declare void @llvm.arm.neon.vst3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind
219 declare void @llvm.arm.neon.vst3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind
220 declare void @llvm.arm.neon.vst3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind
222 declare void @llvm.arm.neon.vst3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind
223 declare void @llvm.arm.neon.vst3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind
224 declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind
227 define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind {
229 ;Check the alignment value. Max for this instruction is 32 bits:
230 ;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
231 %tmp1 = load <8 x i8>* %B
232 call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
236 define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind {
239 %tmp0 = bitcast i16* %A to i8*
240 %tmp1 = load <4 x i16>* %B
241 call void @llvm.arm.neon.vst4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
245 define void @vst4lanei32(i32* %A, <2 x i32>* %B) nounwind {
247 ;Check the alignment value. Max for this instruction is 128 bits:
248 ;CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
249 %tmp0 = bitcast i32* %A to i8*
250 %tmp1 = load <2 x i32>* %B
251 call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
255 define void @vst4lanef(float* %A, <2 x float>* %B) nounwind {
258 %tmp0 = bitcast float* %A to i8*
259 %tmp1 = load <2 x float>* %B
260 call void @llvm.arm.neon.vst4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
264 define void @vst4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
265 ;CHECK: vst4laneQi16:
266 ;Check the alignment value. Max for this instruction is 64 bits:
267 ;CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
268 %tmp0 = bitcast i16* %A to i8*
269 %tmp1 = load <8 x i16>* %B
270 call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 16)
274 define void @vst4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
275 ;CHECK: vst4laneQi32:
276 ;Check the (default) alignment.
277 ;CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
278 %tmp0 = bitcast i32* %A to i8*
279 %tmp1 = load <4 x i32>* %B
280 call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
284 define void @vst4laneQf(float* %A, <4 x float>* %B) nounwind {
287 %tmp0 = bitcast float* %A to i8*
288 %tmp1 = load <4 x float>* %B
289 call void @llvm.arm.neon.vst4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
293 declare void @llvm.arm.neon.vst4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind
294 declare void @llvm.arm.neon.vst4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind
295 declare void @llvm.arm.neon.vst4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind
296 declare void @llvm.arm.neon.vst4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind
298 declare void @llvm.arm.neon.vst4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind
299 declare void @llvm.arm.neon.vst4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind
300 declare void @llvm.arm.neon.vst4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind