1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind {
5 ;Check the (default) alignment.
6 ;CHECK: vst1.8 {d16[3]}, [r0]
7 %tmp1 = load <8 x i8>* %B
8 %tmp2 = extractelement <8 x i8> %tmp1, i32 3
9 store i8 %tmp2, i8* %A, align 8
13 ;Check for a post-increment updating store.
14 define void @vst1lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind {
15 ;CHECK: vst1lanei8_update:
16 ;CHECK: vst1.8 {d16[3]}, [r2]!
18 %tmp1 = load <8 x i8>* %B
19 %tmp2 = extractelement <8 x i8> %tmp1, i32 3
20 store i8 %tmp2, i8* %A, align 8
21 %tmp3 = getelementptr i8* %A, i32 1
22 store i8* %tmp3, i8** %ptr
26 define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind {
28 ;Check the alignment value. Max for this instruction is 16 bits:
29 ;CHECK: vst1.16 {d16[2]}, [r0, :16]
30 %tmp1 = load <4 x i16>* %B
31 %tmp2 = extractelement <4 x i16> %tmp1, i32 2
32 store i16 %tmp2, i16* %A, align 8
36 define void @vst1lanei32(i32* %A, <2 x i32>* %B) nounwind {
38 ;Check the alignment value. Max for this instruction is 32 bits:
39 ;CHECK: vst1.32 {d16[1]}, [r0, :32]
40 %tmp1 = load <2 x i32>* %B
41 %tmp2 = extractelement <2 x i32> %tmp1, i32 1
42 store i32 %tmp2, i32* %A, align 8
46 define void @vst1lanef(float* %A, <2 x float>* %B) nounwind {
48 ;CHECK: vst1.32 {d16[1]}, [r0]
49 %tmp1 = load <2 x float>* %B
50 %tmp2 = extractelement <2 x float> %tmp1, i32 1
51 store float %tmp2, float* %A
55 define void @vst1laneQi8(i8* %A, <16 x i8>* %B) nounwind {
57 ;CHECK: vst1.8 {d17[1]}, [r0]
58 %tmp1 = load <16 x i8>* %B
59 %tmp2 = extractelement <16 x i8> %tmp1, i32 9
60 store i8 %tmp2, i8* %A, align 8
64 define void @vst1laneQi16(i16* %A, <8 x i16>* %B) nounwind {
66 ;CHECK: vst1.16 {d17[1]}, [r0, :16]
67 %tmp1 = load <8 x i16>* %B
68 %tmp2 = extractelement <8 x i16> %tmp1, i32 5
69 store i16 %tmp2, i16* %A, align 8
73 define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind {
75 ;CHECK: vst1.32 {d17[1]}, [r0, :32]
76 %tmp1 = load <4 x i32>* %B
77 %tmp2 = extractelement <4 x i32> %tmp1, i32 3
78 store i32 %tmp2, i32* %A, align 8
82 ;Check for a post-increment updating store.
83 define void @vst1laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind {
84 ;CHECK: vst1laneQi32_update:
85 ;CHECK: vst1.32 {d17[1]}, [r1, :32]!
87 %tmp1 = load <4 x i32>* %B
88 %tmp2 = extractelement <4 x i32> %tmp1, i32 3
89 store i32 %tmp2, i32* %A, align 8
90 %tmp3 = getelementptr i32* %A, i32 1
91 store i32* %tmp3, i32** %ptr
95 define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind {
97 ;CHECK: vst1.32 {d17[1]}, [r0]
98 %tmp1 = load <4 x float>* %B
99 %tmp2 = extractelement <4 x float> %tmp1, i32 3
100 store float %tmp2, float* %A
104 define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
106 ;Check the alignment value. Max for this instruction is 16 bits:
107 ;CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16]
108 %tmp1 = load <8 x i8>* %B
109 call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
113 define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind {
115 ;Check the alignment value. Max for this instruction is 32 bits:
116 ;CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32]
117 %tmp0 = bitcast i16* %A to i8*
118 %tmp1 = load <4 x i16>* %B
119 call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
123 ;Check for a post-increment updating store with register increment.
124 define void @vst2lanei16_update(i16** %ptr, <4 x i16>* %B, i32 %inc) nounwind {
125 ;CHECK: vst2lanei16_update:
126 ;CHECK: vst2.16 {d16[1], d17[1]}, [r1], r2
128 %tmp0 = bitcast i16* %A to i8*
129 %tmp1 = load <4 x i16>* %B
130 call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 2)
131 %tmp2 = getelementptr i16* %A, i32 %inc
132 store i16* %tmp2, i16** %ptr
136 define void @vst2lanei32(i32* %A, <2 x i32>* %B) nounwind {
139 %tmp0 = bitcast i32* %A to i8*
140 %tmp1 = load <2 x i32>* %B
141 call void @llvm.arm.neon.vst2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
145 define void @vst2lanef(float* %A, <2 x float>* %B) nounwind {
148 %tmp0 = bitcast float* %A to i8*
149 %tmp1 = load <2 x float>* %B
150 call void @llvm.arm.neon.vst2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
154 define void @vst2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
155 ;CHECK: vst2laneQi16:
156 ;Check the (default) alignment.
157 ;CHECK: vst2.16 {d17[1], d19[1]}, [r0]
158 %tmp0 = bitcast i16* %A to i8*
159 %tmp1 = load <8 x i16>* %B
160 call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
164 define void @vst2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
165 ;CHECK: vst2laneQi32:
166 ;Check the alignment value. Max for this instruction is 64 bits:
167 ;CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64]
168 %tmp0 = bitcast i32* %A to i8*
169 %tmp1 = load <4 x i32>* %B
170 call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
174 define void @vst2laneQf(float* %A, <4 x float>* %B) nounwind {
177 %tmp0 = bitcast float* %A to i8*
178 %tmp1 = load <4 x float>* %B
179 call void @llvm.arm.neon.vst2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 3, i32 1)
183 declare void @llvm.arm.neon.vst2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind
184 declare void @llvm.arm.neon.vst2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind
185 declare void @llvm.arm.neon.vst2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind
186 declare void @llvm.arm.neon.vst2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind
188 declare void @llvm.arm.neon.vst2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind
189 declare void @llvm.arm.neon.vst2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind
190 declare void @llvm.arm.neon.vst2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind
192 define void @vst3lanei8(i8* %A, <8 x i8>* %B) nounwind {
195 %tmp1 = load <8 x i8>* %B
196 call void @llvm.arm.neon.vst3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
200 define void @vst3lanei16(i16* %A, <4 x i16>* %B) nounwind {
202 ;Check the (default) alignment value. VST3 does not support alignment.
203 ;CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0]
204 %tmp0 = bitcast i16* %A to i8*
205 %tmp1 = load <4 x i16>* %B
206 call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
210 define void @vst3lanei32(i32* %A, <2 x i32>* %B) nounwind {
213 %tmp0 = bitcast i32* %A to i8*
214 %tmp1 = load <2 x i32>* %B
215 call void @llvm.arm.neon.vst3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
219 define void @vst3lanef(float* %A, <2 x float>* %B) nounwind {
222 %tmp0 = bitcast float* %A to i8*
223 %tmp1 = load <2 x float>* %B
224 call void @llvm.arm.neon.vst3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
228 define void @vst3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
229 ;CHECK: vst3laneQi16:
230 ;Check the (default) alignment value. VST3 does not support alignment.
231 ;CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0]
232 %tmp0 = bitcast i16* %A to i8*
233 %tmp1 = load <8 x i16>* %B
234 call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 8)
238 define void @vst3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
239 ;CHECK: vst3laneQi32:
241 %tmp0 = bitcast i32* %A to i8*
242 %tmp1 = load <4 x i32>* %B
243 call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1)
247 ;Check for a post-increment updating store.
248 define void @vst3laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind {
249 ;CHECK: vst3laneQi32_update:
250 ;CHECK: vst3.32 {d16[0], d18[0], d20[0]}, [r1]!
252 %tmp0 = bitcast i32* %A to i8*
253 %tmp1 = load <4 x i32>* %B
254 call void @llvm.arm.neon.vst3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 0, i32 1)
255 %tmp2 = getelementptr i32* %A, i32 3
256 store i32* %tmp2, i32** %ptr
260 define void @vst3laneQf(float* %A, <4 x float>* %B) nounwind {
263 %tmp0 = bitcast float* %A to i8*
264 %tmp1 = load <4 x float>* %B
265 call void @llvm.arm.neon.vst3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
269 declare void @llvm.arm.neon.vst3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind
270 declare void @llvm.arm.neon.vst3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind
271 declare void @llvm.arm.neon.vst3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind
272 declare void @llvm.arm.neon.vst3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind
274 declare void @llvm.arm.neon.vst3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind
275 declare void @llvm.arm.neon.vst3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind
276 declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind
279 define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind {
281 ;Check the alignment value. Max for this instruction is 32 bits:
282 ;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
283 %tmp1 = load <8 x i8>* %B
284 call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
288 ;Check for a post-increment updating store.
289 define void @vst4lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind {
290 ;CHECK: vst4lanei8_update:
291 ;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r1, :32]!
293 %tmp1 = load <8 x i8>* %B
294 call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
295 %tmp2 = getelementptr i8* %A, i32 4
296 store i8* %tmp2, i8** %ptr
300 define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind {
303 %tmp0 = bitcast i16* %A to i8*
304 %tmp1 = load <4 x i16>* %B
305 call void @llvm.arm.neon.vst4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
309 define void @vst4lanei32(i32* %A, <2 x i32>* %B) nounwind {
311 ;Check the alignment value. Max for this instruction is 128 bits:
312 ;CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
313 %tmp0 = bitcast i32* %A to i8*
314 %tmp1 = load <2 x i32>* %B
315 call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
319 define void @vst4lanef(float* %A, <2 x float>* %B) nounwind {
322 %tmp0 = bitcast float* %A to i8*
323 %tmp1 = load <2 x float>* %B
324 call void @llvm.arm.neon.vst4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
328 define void @vst4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
329 ;CHECK: vst4laneQi16:
330 ;Check the alignment value. Max for this instruction is 64 bits:
331 ;CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
332 %tmp0 = bitcast i16* %A to i8*
333 %tmp1 = load <8 x i16>* %B
334 call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 16)
338 define void @vst4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
339 ;CHECK: vst4laneQi32:
340 ;Check the (default) alignment.
341 ;CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
342 %tmp0 = bitcast i32* %A to i8*
343 %tmp1 = load <4 x i32>* %B
344 call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
348 define void @vst4laneQf(float* %A, <4 x float>* %B) nounwind {
351 %tmp0 = bitcast float* %A to i8*
352 %tmp1 = load <4 x float>* %B
353 call void @llvm.arm.neon.vst4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
357 declare void @llvm.arm.neon.vst4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind
358 declare void @llvm.arm.neon.vst4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind
359 declare void @llvm.arm.neon.vst4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind
360 declare void @llvm.arm.neon.vst4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind
362 declare void @llvm.arm.neon.vst4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind
363 declare void @llvm.arm.neon.vst4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind
364 declare void @llvm.arm.neon.vst4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind