1 ; RUN: llc -mtriple=arm64-linux-gnu -enable-misched=false < %s | FileCheck %s
3 @var = global i32 0, align 4
5 define i128 @test_i128_align(i32, i128 %arg, i32 %after) {
6 store i32 %after, i32* @var, align 4
7 ; CHECK: str w4, [{{x[0-9]+}}, :lo12:var]
14 @var64 = global i64 0, align 8
16 ; Check stack slots are 64-bit at all times.
17 define void @test_stack_slots([8 x i32], i1 %bool, i8 %char, i16 %short,
18 i32 %int, i64 %long) {
19 ; Part of last store. Blasted scheduler.
20 ; CHECK: ldr [[LONG:x[0-9]+]], [sp, #32]
22 %ext_bool = zext i1 %bool to i64
23 store volatile i64 %ext_bool, i64* @var64, align 8
24 ; CHECK: ldr w[[EXT:[0-9]+]], [sp]
25 ; CHECK: and x[[EXTED:[0-9]+]], x[[EXT]], #0x1
26 ; CHECK: str x[[EXTED]], [{{x[0-9]+}}, :lo12:var64]
28 %ext_char = zext i8 %char to i64
29 store volatile i64 %ext_char, i64* @var64, align 8
30 ; CHECK: ldrb w[[EXT:[0-9]+]], [sp, #8]
31 ; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
33 %ext_short = zext i16 %short to i64
34 store volatile i64 %ext_short, i64* @var64, align 8
35 ; CHECK: ldrh w[[EXT:[0-9]+]], [sp, #16]
36 ; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
38 %ext_int = zext i32 %int to i64
39 store volatile i64 %ext_int, i64* @var64, align 8
40 ; CHECK: ldr w[[EXT:[0-9]+]], [sp, #24]
41 ; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
43 store volatile i64 %long, i64* @var64, align 8
44 ; CHECK: str [[LONG]], [{{x[0-9]+}}, :lo12:var64]
49 ; Make sure the callee does extensions (in the absence of zext/sext
50 ; keyword on args) while we're here.
52 define void @test_extension(i1 %bool, i8 %char, i16 %short, i32 %int) {
53 %ext_bool = zext i1 %bool to i64
54 store volatile i64 %ext_bool, i64* @var64
55 ; CHECK: and [[EXT:x[0-9]+]], x0, #0x1
56 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
58 %ext_char = sext i8 %char to i64
59 store volatile i64 %ext_char, i64* @var64
60 ; CHECK: sxtb [[EXT:x[0-9]+]], x1
61 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
63 %ext_short = zext i16 %short to i64
64 store volatile i64 %ext_short, i64* @var64
65 ; CHECK: and [[EXT:x[0-9]+]], x2, #0xffff
66 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
68 %ext_int = zext i32 %int to i64
69 store volatile i64 %ext_int, i64* @var64
70 ; CHECK: uxtw [[EXT:x[0-9]+]], x3
71 ; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
76 declare void @variadic(i32 %a, ...)
78 ; Under AAPCS variadic functions have the same calling convention as
79 ; others. The extra arguments should go in registers rather than on the stack.
80 define void @test_variadic() {
81 call void(i32, ...)* @variadic(i32 0, i64 1, double 2.0)
82 ; CHECK: fmov d0, #2.0
83 ; CHECK: orr w1, wzr, #0x1
88 ; We weren't marking x7 as used after deciding that the i128 didn't fit into
89 ; registers and putting the first half on the stack, so the *second* half went
91 define i128 @test_i128_shadow([7 x i64] %x0_x6, i128 %sp) {
92 ; CHECK-LABEL: test_i128_shadow:
93 ; CHECK: ldp x0, x1, [sp]