1 ; RUN: llc -mtriple arm64_be < %s -arm64-load-store-opt=false -o - | FileCheck %s
3 ; CHECK-LABEL: test_i64_f64:
4 define i64 @test_i64_f64(double %p) {
6 %1 = fadd double %p, %p
7 %2 = bitcast double %1 to i64
12 ; CHECK-LABEL: test_i64_v1i64:
13 define i64 @test_i64_v1i64(<1 x i64> %p) {
15 %1 = add <1 x i64> %p, %p
16 %2 = bitcast <1 x i64> %1 to i64
21 ; CHECK-LABEL: test_i64_v2f32:
22 define i64 @test_i64_v2f32(<2 x float> %p) {
23 ; CHECK: rev64 v{{[0-9]+}}.2s
24 %1 = fadd <2 x float> %p, %p
25 %2 = bitcast <2 x float> %1 to i64
30 ; CHECK-LABEL: test_i64_v2i32:
31 define i64 @test_i64_v2i32(<2 x i32> %p) {
32 ; CHECK: rev64 v{{[0-9]+}}.2s
33 %1 = add <2 x i32> %p, %p
34 %2 = bitcast <2 x i32> %1 to i64
39 ; CHECK-LABEL: test_i64_v4i16:
40 define i64 @test_i64_v4i16(<4 x i16> %p) {
41 ; CHECK: rev64 v{{[0-9]+}}.4h
42 %1 = add <4 x i16> %p, %p
43 %2 = bitcast <4 x i16> %1 to i64
48 ; CHECK-LABEL: test_i64_v8i8:
49 define i64 @test_i64_v8i8(<8 x i8> %p) {
50 ; CHECK: rev64 v{{[0-9]+}}.8b
51 %1 = add <8 x i8> %p, %p
52 %2 = bitcast <8 x i8> %1 to i64
57 ; CHECK-LABEL: test_f64_i64:
58 define double @test_f64_i64(i64 %p) {
61 %2 = bitcast i64 %1 to double
62 %3 = fadd double %2, %2
66 ; CHECK-LABEL: test_f64_v1i64:
67 define double @test_f64_v1i64(<1 x i64> %p) {
69 %1 = add <1 x i64> %p, %p
70 %2 = bitcast <1 x i64> %1 to double
71 %3 = fadd double %2, %2
75 ; CHECK-LABEL: test_f64_v2f32:
76 define double @test_f64_v2f32(<2 x float> %p) {
77 ; CHECK: rev64 v{{[0-9]+}}.2s
78 %1 = fadd <2 x float> %p, %p
79 %2 = bitcast <2 x float> %1 to double
80 %3 = fadd double %2, %2
84 ; CHECK-LABEL: test_f64_v2i32:
85 define double @test_f64_v2i32(<2 x i32> %p) {
86 ; CHECK: rev64 v{{[0-9]+}}.2s
87 %1 = add <2 x i32> %p, %p
88 %2 = bitcast <2 x i32> %1 to double
89 %3 = fadd double %2, %2
93 ; CHECK-LABEL: test_f64_v4i16:
94 define double @test_f64_v4i16(<4 x i16> %p) {
95 ; CHECK: rev64 v{{[0-9]+}}.4h
96 %1 = add <4 x i16> %p, %p
97 %2 = bitcast <4 x i16> %1 to double
98 %3 = fadd double %2, %2
102 ; CHECK-LABEL: test_f64_v8i8:
103 define double @test_f64_v8i8(<8 x i8> %p) {
104 ; CHECK: rev64 v{{[0-9]+}}.8b
105 %1 = add <8 x i8> %p, %p
106 %2 = bitcast <8 x i8> %1 to double
107 %3 = fadd double %2, %2
111 ; CHECK-LABEL: test_v1i64_i64:
112 define <1 x i64> @test_v1i64_i64(i64 %p) {
115 %2 = bitcast i64 %1 to <1 x i64>
116 %3 = add <1 x i64> %2, %2
120 ; CHECK-LABEL: test_v1i64_f64:
121 define <1 x i64> @test_v1i64_f64(double %p) {
123 %1 = fadd double %p, %p
124 %2 = bitcast double %1 to <1 x i64>
125 %3 = add <1 x i64> %2, %2
129 ; CHECK-LABEL: test_v1i64_v2f32:
130 define <1 x i64> @test_v1i64_v2f32(<2 x float> %p) {
131 ; CHECK: rev64 v{{[0-9]+}}.2s
132 %1 = fadd <2 x float> %p, %p
133 %2 = bitcast <2 x float> %1 to <1 x i64>
134 %3 = add <1 x i64> %2, %2
138 ; CHECK-LABEL: test_v1i64_v2i32:
139 define <1 x i64> @test_v1i64_v2i32(<2 x i32> %p) {
140 ; CHECK: rev64 v{{[0-9]+}}.2s
141 %1 = add <2 x i32> %p, %p
142 %2 = bitcast <2 x i32> %1 to <1 x i64>
143 %3 = add <1 x i64> %2, %2
147 ; CHECK-LABEL: test_v1i64_v4i16:
148 define <1 x i64> @test_v1i64_v4i16(<4 x i16> %p) {
149 ; CHECK: rev64 v{{[0-9]+}}.4h
150 %1 = add <4 x i16> %p, %p
151 %2 = bitcast <4 x i16> %1 to <1 x i64>
152 %3 = add <1 x i64> %2, %2
156 ; CHECK-LABEL: test_v1i64_v8i8:
157 define <1 x i64> @test_v1i64_v8i8(<8 x i8> %p) {
158 ; CHECK: rev64 v{{[0-9]+}}.8b
159 %1 = add <8 x i8> %p, %p
160 %2 = bitcast <8 x i8> %1 to <1 x i64>
161 %3 = add <1 x i64> %2, %2
165 ; CHECK-LABEL: test_v2f32_i64:
166 define <2 x float> @test_v2f32_i64(i64 %p) {
167 ; CHECK: rev64 v{{[0-9]+}}.2s
169 %2 = bitcast i64 %1 to <2 x float>
170 %3 = fadd <2 x float> %2, %2
174 ; CHECK-LABEL: test_v2f32_f64:
175 define <2 x float> @test_v2f32_f64(double %p) {
176 ; CHECK: rev64 v{{[0-9]+}}.2s
177 %1 = fadd double %p, %p
178 %2 = bitcast double %1 to <2 x float>
179 %3 = fadd <2 x float> %2, %2
183 ; CHECK-LABEL: test_v2f32_v1i64:
184 define <2 x float> @test_v2f32_v1i64(<1 x i64> %p) {
185 ; CHECK: rev64 v{{[0-9]+}}.2s
186 %1 = add <1 x i64> %p, %p
187 %2 = bitcast <1 x i64> %1 to <2 x float>
188 %3 = fadd <2 x float> %2, %2
192 ; CHECK-LABEL: test_v2f32_v2i32:
193 define <2 x float> @test_v2f32_v2i32(<2 x i32> %p) {
194 ; CHECK: rev64 v{{[0-9]+}}.2s
195 ; CHECK: rev64 v{{[0-9]+}}.2s
196 %1 = add <2 x i32> %p, %p
197 %2 = bitcast <2 x i32> %1 to <2 x float>
198 %3 = fadd <2 x float> %2, %2
202 ; CHECK-LABEL: test_v2f32_v4i16:
203 define <2 x float> @test_v2f32_v4i16(<4 x i16> %p) {
204 ; CHECK: rev64 v{{[0-9]+}}.4h
205 ; CHECK: rev64 v{{[0-9]+}}.2s
206 %1 = add <4 x i16> %p, %p
207 %2 = bitcast <4 x i16> %1 to <2 x float>
208 %3 = fadd <2 x float> %2, %2
212 ; CHECK-LABEL: test_v2f32_v8i8:
213 define <2 x float> @test_v2f32_v8i8(<8 x i8> %p) {
214 ; CHECK: rev64 v{{[0-9]+}}.8b
215 ; CHECK: rev64 v{{[0-9]+}}.2s
216 %1 = add <8 x i8> %p, %p
217 %2 = bitcast <8 x i8> %1 to <2 x float>
218 %3 = fadd <2 x float> %2, %2
222 ; CHECK-LABEL: test_v2i32_i64:
223 define <2 x i32> @test_v2i32_i64(i64 %p) {
224 ; CHECK: rev64 v{{[0-9]+}}.2s
226 %2 = bitcast i64 %1 to <2 x i32>
227 %3 = add <2 x i32> %2, %2
231 ; CHECK-LABEL: test_v2i32_f64:
232 define <2 x i32> @test_v2i32_f64(double %p) {
233 ; CHECK: rev64 v{{[0-9]+}}.2s
234 %1 = fadd double %p, %p
235 %2 = bitcast double %1 to <2 x i32>
236 %3 = add <2 x i32> %2, %2
240 ; CHECK-LABEL: test_v2i32_v1i64:
241 define <2 x i32> @test_v2i32_v1i64(<1 x i64> %p) {
242 ; CHECK: rev64 v{{[0-9]+}}.2s
243 %1 = add <1 x i64> %p, %p
244 %2 = bitcast <1 x i64> %1 to <2 x i32>
245 %3 = add <2 x i32> %2, %2
249 ; CHECK-LABEL: test_v2i32_v2f32:
250 define <2 x i32> @test_v2i32_v2f32(<2 x float> %p) {
251 ; CHECK: rev64 v{{[0-9]+}}.2s
252 ; CHECK: rev64 v{{[0-9]+}}.2s
253 %1 = fadd <2 x float> %p, %p
254 %2 = bitcast <2 x float> %1 to <2 x i32>
255 %3 = add <2 x i32> %2, %2
259 ; CHECK-LABEL: test_v2i32_v4i16:
260 define <2 x i32> @test_v2i32_v4i16(<4 x i16> %p) {
261 ; CHECK: rev64 v{{[0-9]+}}.4h
262 ; CHECK: rev64 v{{[0-9]+}}.2s
263 %1 = add <4 x i16> %p, %p
264 %2 = bitcast <4 x i16> %1 to <2 x i32>
265 %3 = add <2 x i32> %2, %2
269 ; CHECK-LABEL: test_v2i32_v8i8:
270 define <2 x i32> @test_v2i32_v8i8(<8 x i8> %p) {
271 ; CHECK: rev64 v{{[0-9]+}}.8b
272 ; CHECK: rev64 v{{[0-9]+}}.2s
273 %1 = add <8 x i8> %p, %p
274 %2 = bitcast <8 x i8> %1 to <2 x i32>
275 %3 = add <2 x i32> %2, %2
279 ; CHECK-LABEL: test_v4i16_i64:
280 define <4 x i16> @test_v4i16_i64(i64 %p) {
281 ; CHECK: rev64 v{{[0-9]+}}.4h
283 %2 = bitcast i64 %1 to <4 x i16>
284 %3 = add <4 x i16> %2, %2
288 ; CHECK-LABEL: test_v4i16_f64:
289 define <4 x i16> @test_v4i16_f64(double %p) {
290 ; CHECK: rev64 v{{[0-9]+}}.4h
291 %1 = fadd double %p, %p
292 %2 = bitcast double %1 to <4 x i16>
293 %3 = add <4 x i16> %2, %2
297 ; CHECK-LABEL: test_v4i16_v1i64:
298 define <4 x i16> @test_v4i16_v1i64(<1 x i64> %p) {
299 ; CHECK: rev64 v{{[0-9]+}}.4h
300 %1 = add <1 x i64> %p, %p
301 %2 = bitcast <1 x i64> %1 to <4 x i16>
302 %3 = add <4 x i16> %2, %2
306 ; CHECK-LABEL: test_v4i16_v2f32:
307 define <4 x i16> @test_v4i16_v2f32(<2 x float> %p) {
308 ; CHECK: rev64 v{{[0-9]+}}.2s
309 ; CHECK: rev64 v{{[0-9]+}}.4h
310 %1 = fadd <2 x float> %p, %p
311 %2 = bitcast <2 x float> %1 to <4 x i16>
312 %3 = add <4 x i16> %2, %2
316 ; CHECK-LABEL: test_v4i16_v2i32:
317 define <4 x i16> @test_v4i16_v2i32(<2 x i32> %p) {
318 ; CHECK: rev64 v{{[0-9]+}}.2s
319 ; CHECK: rev64 v{{[0-9]+}}.4h
320 %1 = add <2 x i32> %p, %p
321 %2 = bitcast <2 x i32> %1 to <4 x i16>
322 %3 = add <4 x i16> %2, %2
326 ; CHECK-LABEL: test_v4i16_v8i8:
327 define <4 x i16> @test_v4i16_v8i8(<8 x i8> %p) {
328 ; CHECK: rev64 v{{[0-9]+}}.8b
329 ; CHECK: rev64 v{{[0-9]+}}.4h
330 %1 = add <8 x i8> %p, %p
331 %2 = bitcast <8 x i8> %1 to <4 x i16>
332 %3 = add <4 x i16> %2, %2
336 ; CHECK-LABEL: test_v8i8_i64:
337 define <8 x i8> @test_v8i8_i64(i64 %p) {
338 ; CHECK: rev64 v{{[0-9]+}}.8b
340 %2 = bitcast i64 %1 to <8 x i8>
341 %3 = add <8 x i8> %2, %2
345 ; CHECK-LABEL: test_v8i8_f64:
346 define <8 x i8> @test_v8i8_f64(double %p) {
347 ; CHECK: rev64 v{{[0-9]+}}.8b
348 %1 = fadd double %p, %p
349 %2 = bitcast double %1 to <8 x i8>
350 %3 = add <8 x i8> %2, %2
354 ; CHECK-LABEL: test_v8i8_v1i64:
355 define <8 x i8> @test_v8i8_v1i64(<1 x i64> %p) {
356 ; CHECK: rev64 v{{[0-9]+}}.8b
357 %1 = add <1 x i64> %p, %p
358 %2 = bitcast <1 x i64> %1 to <8 x i8>
359 %3 = add <8 x i8> %2, %2
363 ; CHECK-LABEL: test_v8i8_v2f32:
364 define <8 x i8> @test_v8i8_v2f32(<2 x float> %p) {
365 ; CHECK: rev64 v{{[0-9]+}}.2s
366 ; CHECK: rev64 v{{[0-9]+}}.8b
367 %1 = fadd <2 x float> %p, %p
368 %2 = bitcast <2 x float> %1 to <8 x i8>
369 %3 = add <8 x i8> %2, %2
373 ; CHECK-LABEL: test_v8i8_v2i32:
374 define <8 x i8> @test_v8i8_v2i32(<2 x i32> %p) {
375 ; CHECK: rev64 v{{[0-9]+}}.2s
376 ; CHECK: rev64 v{{[0-9]+}}.8b
377 %1 = add <2 x i32> %p, %p
378 %2 = bitcast <2 x i32> %1 to <8 x i8>
379 %3 = add <8 x i8> %2, %2
383 ; CHECK-LABEL: test_v8i8_v4i16:
384 define <8 x i8> @test_v8i8_v4i16(<4 x i16> %p) {
385 ; CHECK: rev64 v{{[0-9]+}}.4h
386 ; CHECK: rev64 v{{[0-9]+}}.8b
387 %1 = add <4 x i16> %p, %p
388 %2 = bitcast <4 x i16> %1 to <8 x i8>
389 %3 = add <8 x i8> %2, %2
393 ; CHECK-LABEL: test_f128_v2f64:
394 define fp128 @test_f128_v2f64(<2 x double> %p) {
396 %1 = fadd <2 x double> %p, %p
397 %2 = bitcast <2 x double> %1 to fp128
398 %3 = fadd fp128 %2, %2
402 ; CHECK-LABEL: test_f128_v2i64:
403 define fp128 @test_f128_v2i64(<2 x i64> %p) {
405 %1 = add <2 x i64> %p, %p
406 %2 = bitcast <2 x i64> %1 to fp128
407 %3 = fadd fp128 %2, %2
411 ; CHECK-LABEL: test_f128_v4f32:
412 define fp128 @test_f128_v4f32(<4 x float> %p) {
413 ; CHECK: rev64 v{{[0-9]+}}.4s
415 %1 = fadd <4 x float> %p, %p
416 %2 = bitcast <4 x float> %1 to fp128
417 %3 = fadd fp128 %2, %2
421 ; CHECK-LABEL: test_f128_v4i32:
422 define fp128 @test_f128_v4i32(<4 x i32> %p) {
423 ; CHECK: rev64 v{{[0-9]+}}.4s
425 %1 = add <4 x i32> %p, %p
426 %2 = bitcast <4 x i32> %1 to fp128
427 %3 = fadd fp128 %2, %2
431 ; CHECK-LABEL: test_f128_v8i16:
432 define fp128 @test_f128_v8i16(<8 x i16> %p) {
433 ; CHECK: rev64 v{{[0-9]+}}.8h
435 %1 = add <8 x i16> %p, %p
436 %2 = bitcast <8 x i16> %1 to fp128
437 %3 = fadd fp128 %2, %2
441 ; CHECK-LABEL: test_f128_v16i8:
442 define fp128 @test_f128_v16i8(<16 x i8> %p) {
443 ; CHECK: rev64 v{{[0-9]+}}.16b
445 %1 = add <16 x i8> %p, %p
446 %2 = bitcast <16 x i8> %1 to fp128
447 %3 = fadd fp128 %2, %2
451 ; CHECK-LABEL: test_v2f64_f128:
452 define <2 x double> @test_v2f64_f128(fp128 %p) {
454 %1 = fadd fp128 %p, %p
455 %2 = bitcast fp128 %1 to <2 x double>
456 %3 = fadd <2 x double> %2, %2
460 ; CHECK-LABEL: test_v2f64_v2i64:
461 define <2 x double> @test_v2f64_v2i64(<2 x i64> %p) {
464 %1 = add <2 x i64> %p, %p
465 %2 = bitcast <2 x i64> %1 to <2 x double>
466 %3 = fadd <2 x double> %2, %2
470 ; CHECK-LABEL: test_v2f64_v4f32:
471 define <2 x double> @test_v2f64_v4f32(<4 x float> %p) {
472 ; CHECK: rev64 v{{[0-9]+}}.4s
475 %1 = fadd <4 x float> %p, %p
476 %2 = bitcast <4 x float> %1 to <2 x double>
477 %3 = fadd <2 x double> %2, %2
481 ; CHECK-LABEL: test_v2f64_v4i32:
482 define <2 x double> @test_v2f64_v4i32(<4 x i32> %p) {
483 ; CHECK: rev64 v{{[0-9]+}}.4s
486 %1 = add <4 x i32> %p, %p
487 %2 = bitcast <4 x i32> %1 to <2 x double>
488 %3 = fadd <2 x double> %2, %2
492 ; CHECK-LABEL: test_v2f64_v8i16:
493 define <2 x double> @test_v2f64_v8i16(<8 x i16> %p) {
494 ; CHECK: rev64 v{{[0-9]+}}.8h
497 %1 = add <8 x i16> %p, %p
498 %2 = bitcast <8 x i16> %1 to <2 x double>
499 %3 = fadd <2 x double> %2, %2
503 ; CHECK-LABEL: test_v2f64_v16i8:
504 define <2 x double> @test_v2f64_v16i8(<16 x i8> %p) {
505 ; CHECK: rev64 v{{[0-9]+}}.16b
508 %1 = add <16 x i8> %p, %p
509 %2 = bitcast <16 x i8> %1 to <2 x double>
510 %3 = fadd <2 x double> %2, %2
514 ; CHECK-LABEL: test_v2i64_f128:
515 define <2 x i64> @test_v2i64_f128(fp128 %p) {
517 %1 = fadd fp128 %p, %p
518 %2 = bitcast fp128 %1 to <2 x i64>
519 %3 = add <2 x i64> %2, %2
523 ; CHECK-LABEL: test_v2i64_v2f64:
524 define <2 x i64> @test_v2i64_v2f64(<2 x double> %p) {
527 %1 = fadd <2 x double> %p, %p
528 %2 = bitcast <2 x double> %1 to <2 x i64>
529 %3 = add <2 x i64> %2, %2
533 ; CHECK-LABEL: test_v2i64_v4f32:
534 define <2 x i64> @test_v2i64_v4f32(<4 x float> %p) {
535 ; CHECK: rev64 v{{[0-9]+}}.4s
538 %1 = fadd <4 x float> %p, %p
539 %2 = bitcast <4 x float> %1 to <2 x i64>
540 %3 = add <2 x i64> %2, %2
544 ; CHECK-LABEL: test_v2i64_v4i32:
545 define <2 x i64> @test_v2i64_v4i32(<4 x i32> %p) {
546 ; CHECK: rev64 v{{[0-9]+}}.4s
549 %1 = add <4 x i32> %p, %p
550 %2 = bitcast <4 x i32> %1 to <2 x i64>
551 %3 = add <2 x i64> %2, %2
555 ; CHECK-LABEL: test_v2i64_v8i16:
556 define <2 x i64> @test_v2i64_v8i16(<8 x i16> %p) {
557 ; CHECK: rev64 v{{[0-9]+}}.8h
560 %1 = add <8 x i16> %p, %p
561 %2 = bitcast <8 x i16> %1 to <2 x i64>
562 %3 = add <2 x i64> %2, %2
566 ; CHECK-LABEL: test_v2i64_v16i8:
567 define <2 x i64> @test_v2i64_v16i8(<16 x i8> %p) {
568 ; CHECK: rev64 v{{[0-9]+}}.16b
571 %1 = add <16 x i8> %p, %p
572 %2 = bitcast <16 x i8> %1 to <2 x i64>
573 %3 = add <2 x i64> %2, %2
577 ; CHECK-LABEL: test_v4f32_f128:
578 define <4 x float> @test_v4f32_f128(fp128 %p) {
579 ; CHECK: rev64 v{{[0-9]+}}.4s
581 %1 = fadd fp128 %p, %p
582 %2 = bitcast fp128 %1 to <4 x float>
583 %3 = fadd <4 x float> %2, %2
587 ; CHECK-LABEL: test_v4f32_v2f64:
588 define <4 x float> @test_v4f32_v2f64(<2 x double> %p) {
590 ; CHECK: rev64 v{{[0-9]+}}.4s
592 %1 = fadd <2 x double> %p, %p
593 %2 = bitcast <2 x double> %1 to <4 x float>
594 %3 = fadd <4 x float> %2, %2
598 ; CHECK-LABEL: test_v4f32_v2i64:
599 define <4 x float> @test_v4f32_v2i64(<2 x i64> %p) {
601 ; CHECK: rev64 v{{[0-9]+}}.4s
603 %1 = add <2 x i64> %p, %p
604 %2 = bitcast <2 x i64> %1 to <4 x float>
605 %3 = fadd <4 x float> %2, %2
609 ; CHECK-LABEL: test_v4f32_v4i32:
610 define <4 x float> @test_v4f32_v4i32(<4 x i32> %p) {
611 ; CHECK: rev64 v{{[0-9]+}}.4s
613 ; CHECK: rev64 v{{[0-9]+}}.4s
615 %1 = add <4 x i32> %p, %p
616 %2 = bitcast <4 x i32> %1 to <4 x float>
617 %3 = fadd <4 x float> %2, %2
621 ; CHECK-LABEL: test_v4f32_v8i16:
622 define <4 x float> @test_v4f32_v8i16(<8 x i16> %p) {
623 ; CHECK: rev64 v{{[0-9]+}}.8h
625 ; CHECK: rev64 v{{[0-9]+}}.4s
627 %1 = add <8 x i16> %p, %p
628 %2 = bitcast <8 x i16> %1 to <4 x float>
629 %3 = fadd <4 x float> %2, %2
633 ; CHECK-LABEL: test_v4f32_v16i8:
634 define <4 x float> @test_v4f32_v16i8(<16 x i8> %p) {
635 ; CHECK: rev64 v{{[0-9]+}}.16b
637 ; CHECK: rev64 v{{[0-9]+}}.4s
639 %1 = add <16 x i8> %p, %p
640 %2 = bitcast <16 x i8> %1 to <4 x float>
641 %3 = fadd <4 x float> %2, %2
645 ; CHECK-LABEL: test_v4i32_f128:
646 define <4 x i32> @test_v4i32_f128(fp128 %p) {
647 ; CHECK: rev64 v{{[0-9]+}}.4s
649 %1 = fadd fp128 %p, %p
650 %2 = bitcast fp128 %1 to <4 x i32>
651 %3 = add <4 x i32> %2, %2
655 ; CHECK-LABEL: test_v4i32_v2f64:
656 define <4 x i32> @test_v4i32_v2f64(<2 x double> %p) {
658 ; CHECK: rev64 v{{[0-9]+}}.4s
660 %1 = fadd <2 x double> %p, %p
661 %2 = bitcast <2 x double> %1 to <4 x i32>
662 %3 = add <4 x i32> %2, %2
666 ; CHECK-LABEL: test_v4i32_v2i64:
667 define <4 x i32> @test_v4i32_v2i64(<2 x i64> %p) {
669 ; CHECK: rev64 v{{[0-9]+}}.4s
671 %1 = add <2 x i64> %p, %p
672 %2 = bitcast <2 x i64> %1 to <4 x i32>
673 %3 = add <4 x i32> %2, %2
677 ; CHECK-LABEL: test_v4i32_v4f32:
678 define <4 x i32> @test_v4i32_v4f32(<4 x float> %p) {
679 ; CHECK: rev64 v{{[0-9]+}}.4s
681 ; CHECK: rev64 v{{[0-9]+}}.4s
683 %1 = fadd <4 x float> %p, %p
684 %2 = bitcast <4 x float> %1 to <4 x i32>
685 %3 = add <4 x i32> %2, %2
689 ; CHECK-LABEL: test_v4i32_v8i16:
690 define <4 x i32> @test_v4i32_v8i16(<8 x i16> %p) {
691 ; CHECK: rev64 v{{[0-9]+}}.8h
693 ; CHECK: rev64 v{{[0-9]+}}.4s
695 %1 = add <8 x i16> %p, %p
696 %2 = bitcast <8 x i16> %1 to <4 x i32>
697 %3 = add <4 x i32> %2, %2
701 ; CHECK-LABEL: test_v4i32_v16i8:
702 define <4 x i32> @test_v4i32_v16i8(<16 x i8> %p) {
703 ; CHECK: rev64 v{{[0-9]+}}.16b
705 ; CHECK: rev64 v{{[0-9]+}}.4s
707 %1 = add <16 x i8> %p, %p
708 %2 = bitcast <16 x i8> %1 to <4 x i32>
709 %3 = add <4 x i32> %2, %2
713 ; CHECK-LABEL: test_v8i16_f128:
714 define <8 x i16> @test_v8i16_f128(fp128 %p) {
715 ; CHECK: rev64 v{{[0-9]+}}.8h
717 %1 = fadd fp128 %p, %p
718 %2 = bitcast fp128 %1 to <8 x i16>
719 %3 = add <8 x i16> %2, %2
723 ; CHECK-LABEL: test_v8i16_v2f64:
724 define <8 x i16> @test_v8i16_v2f64(<2 x double> %p) {
726 ; CHECK: rev64 v{{[0-9]+}}.8h
728 %1 = fadd <2 x double> %p, %p
729 %2 = bitcast <2 x double> %1 to <8 x i16>
730 %3 = add <8 x i16> %2, %2
734 ; CHECK-LABEL: test_v8i16_v2i64:
735 define <8 x i16> @test_v8i16_v2i64(<2 x i64> %p) {
737 ; CHECK: rev64 v{{[0-9]+}}.8h
739 %1 = add <2 x i64> %p, %p
740 %2 = bitcast <2 x i64> %1 to <8 x i16>
741 %3 = add <8 x i16> %2, %2
745 ; CHECK-LABEL: test_v8i16_v4f32:
746 define <8 x i16> @test_v8i16_v4f32(<4 x float> %p) {
747 ; CHECK: rev64 v{{[0-9]+}}.4s
749 ; CHECK: rev64 v{{[0-9]+}}.8h
751 %1 = fadd <4 x float> %p, %p
752 %2 = bitcast <4 x float> %1 to <8 x i16>
753 %3 = add <8 x i16> %2, %2
757 ; CHECK-LABEL: test_v8i16_v4i32:
758 define <8 x i16> @test_v8i16_v4i32(<4 x i32> %p) {
759 ; CHECK: rev64 v{{[0-9]+}}.4s
761 ; CHECK: rev64 v{{[0-9]+}}.8h
763 %1 = add <4 x i32> %p, %p
764 %2 = bitcast <4 x i32> %1 to <8 x i16>
765 %3 = add <8 x i16> %2, %2
769 ; CHECK-LABEL: test_v8i16_v16i8:
770 define <8 x i16> @test_v8i16_v16i8(<16 x i8> %p) {
771 ; CHECK: rev64 v{{[0-9]+}}.16b
773 ; CHECK: rev64 v{{[0-9]+}}.8h
775 %1 = add <16 x i8> %p, %p
776 %2 = bitcast <16 x i8> %1 to <8 x i16>
777 %3 = add <8 x i16> %2, %2
781 ; CHECK-LABEL: test_v16i8_f128:
782 define <16 x i8> @test_v16i8_f128(fp128 %p) {
783 ; CHECK: rev64 v{{[0-9]+}}.16b
785 %1 = fadd fp128 %p, %p
786 %2 = bitcast fp128 %1 to <16 x i8>
787 %3 = add <16 x i8> %2, %2
791 ; CHECK-LABEL: test_v16i8_v2f64:
792 define <16 x i8> @test_v16i8_v2f64(<2 x double> %p) {
794 ; CHECK: rev64 v{{[0-9]+}}.16b
796 %1 = fadd <2 x double> %p, %p
797 %2 = bitcast <2 x double> %1 to <16 x i8>
798 %3 = add <16 x i8> %2, %2
802 ; CHECK-LABEL: test_v16i8_v2i64:
803 define <16 x i8> @test_v16i8_v2i64(<2 x i64> %p) {
805 ; CHECK: rev64 v{{[0-9]+}}.16b
807 %1 = add <2 x i64> %p, %p
808 %2 = bitcast <2 x i64> %1 to <16 x i8>
809 %3 = add <16 x i8> %2, %2
813 ; CHECK-LABEL: test_v16i8_v4f32:
814 define <16 x i8> @test_v16i8_v4f32(<4 x float> %p) {
815 ; CHECK: rev64 v{{[0-9]+}}.4s
817 ; CHECK: rev64 v{{[0-9]+}}.16b
819 %1 = fadd <4 x float> %p, %p
820 %2 = bitcast <4 x float> %1 to <16 x i8>
821 %3 = add <16 x i8> %2, %2
825 ; CHECK-LABEL: test_v16i8_v4i32:
826 define <16 x i8> @test_v16i8_v4i32(<4 x i32> %p) {
827 ; CHECK: rev64 v{{[0-9]+}}.4s
829 ; CHECK: rev64 v{{[0-9]+}}.16b
831 %1 = add <4 x i32> %p, %p
832 %2 = bitcast <4 x i32> %1 to <16 x i8>
833 %3 = add <16 x i8> %2, %2
837 ; CHECK-LABEL: test_v16i8_v8i16:
838 define <16 x i8> @test_v16i8_v8i16(<8 x i16> %p) {
839 ; CHECK: rev64 v{{[0-9]+}}.8h
841 ; CHECK: rev64 v{{[0-9]+}}.16b
843 %1 = add <8 x i16> %p, %p
844 %2 = bitcast <8 x i16> %1 to <16 x i8>
845 %3 = add <16 x i8> %2, %2