1 ; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
3 define i32 @icmp_eq_imm(i32 %a) nounwind ssp {
7 ; CHECK: csinc w0, wzr, wzr, ne
8 %cmp = icmp eq i32 %a, 31
9 %conv = zext i1 %cmp to i32
13 define i32 @icmp_eq_neg_imm(i32 %a) nounwind ssp {
15 ; CHECK: icmp_eq_neg_imm
17 ; CHECK: csinc w0, wzr, wzr, ne
18 %cmp = icmp eq i32 %a, -7
19 %conv = zext i1 %cmp to i32
23 define i32 @icmp_eq(i32 %a, i32 %b) nounwind ssp {
27 ; CHECK: csinc w0, wzr, wzr, ne
28 %cmp = icmp eq i32 %a, %b
29 %conv = zext i1 %cmp to i32
33 define i32 @icmp_ne(i32 %a, i32 %b) nounwind ssp {
37 ; CHECK: csinc w0, wzr, wzr, eq
38 %cmp = icmp ne i32 %a, %b
39 %conv = zext i1 %cmp to i32
43 define i32 @icmp_ugt(i32 %a, i32 %b) nounwind ssp {
47 ; CHECK: csinc w0, wzr, wzr, ls
48 %cmp = icmp ugt i32 %a, %b
49 %conv = zext i1 %cmp to i32
53 define i32 @icmp_uge(i32 %a, i32 %b) nounwind ssp {
57 ; CHECK: csinc w0, wzr, wzr, cc
58 %cmp = icmp uge i32 %a, %b
59 %conv = zext i1 %cmp to i32
63 define i32 @icmp_ult(i32 %a, i32 %b) nounwind ssp {
67 ; CHECK: csinc w0, wzr, wzr, cs
68 %cmp = icmp ult i32 %a, %b
69 %conv = zext i1 %cmp to i32
73 define i32 @icmp_ule(i32 %a, i32 %b) nounwind ssp {
77 ; CHECK: csinc w0, wzr, wzr, hi
78 %cmp = icmp ule i32 %a, %b
79 %conv = zext i1 %cmp to i32
83 define i32 @icmp_sgt(i32 %a, i32 %b) nounwind ssp {
87 ; CHECK: csinc w0, wzr, wzr, le
88 %cmp = icmp sgt i32 %a, %b
89 %conv = zext i1 %cmp to i32
93 define i32 @icmp_sge(i32 %a, i32 %b) nounwind ssp {
97 ; CHECK: csinc w0, wzr, wzr, lt
98 %cmp = icmp sge i32 %a, %b
99 %conv = zext i1 %cmp to i32
103 define i32 @icmp_slt(i32 %a, i32 %b) nounwind ssp {
107 ; CHECK: csinc w0, wzr, wzr, ge
108 %cmp = icmp slt i32 %a, %b
109 %conv = zext i1 %cmp to i32
113 define i32 @icmp_sle(i32 %a, i32 %b) nounwind ssp {
117 ; CHECK: csinc w0, wzr, wzr, gt
118 %cmp = icmp sle i32 %a, %b
119 %conv = zext i1 %cmp to i32
123 define i32 @icmp_i64(i64 %a, i64 %b) nounwind ssp {
127 ; CHECK: csinc w{{[0-9]+}}, wzr, wzr, gt
128 %cmp = icmp sle i64 %a, %b
129 %conv = zext i1 %cmp to i32
133 define zeroext i1 @icmp_eq_i16(i16 %a, i16 %b) nounwind ssp {
139 ; CHECK: csinc w0, wzr, wzr, ne
140 %cmp = icmp eq i16 %a, %b
144 define zeroext i1 @icmp_eq_i8(i8 %a, i8 %b) nounwind ssp {
150 ; CHECK: csinc w0, wzr, wzr, ne
151 %cmp = icmp eq i8 %a, %b
155 define i32 @icmp_i16_unsigned(i16 %a, i16 %b) nounwind {
157 ; CHECK: icmp_i16_unsigned
161 ; CHECK: csinc w0, wzr, wzr, cs
162 %cmp = icmp ult i16 %a, %b
163 %conv2 = zext i1 %cmp to i32
167 define i32 @icmp_i8_signed(i8 %a, i8 %b) nounwind {
169 ; CHECK: @icmp_i8_signed
173 ; CHECK: csinc w0, wzr, wzr, le
174 %cmp = icmp sgt i8 %a, %b
175 %conv2 = zext i1 %cmp to i32
180 define i32 @icmp_i16_signed_const(i16 %a) nounwind {
182 ; CHECK: icmp_i16_signed_const
184 ; CHECK: cmn w0, #233
185 ; CHECK: csinc w0, wzr, wzr, ge
186 ; CHECK: and w0, w0, #0x1
187 %cmp = icmp slt i16 %a, -233
188 %conv2 = zext i1 %cmp to i32
192 define i32 @icmp_i8_signed_const(i8 %a) nounwind {
194 ; CHECK: icmp_i8_signed_const
196 ; CHECK: cmp w0, #124
197 ; CHECK: csinc w0, wzr, wzr, le
198 ; CHECK: and w0, w0, #0x1
199 %cmp = icmp sgt i8 %a, 124
200 %conv2 = zext i1 %cmp to i32
204 define i32 @icmp_i1_unsigned_const(i1 %a) nounwind {
206 ; CHECK: icmp_i1_unsigned_const
207 ; CHECK: and w0, w0, #0x1
209 ; CHECK: csinc w0, wzr, wzr, cs
210 ; CHECK: and w0, w0, #0x1
211 %cmp = icmp ult i1 %a, 0
212 %conv2 = zext i1 %cmp to i32