1 ; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
3 define <2 x float> @frecps_2s(<2 x float>* %A, <2 x float>* %B) nounwind {
4 ;CHECK-LABEL: frecps_2s:
6 %tmp1 = load <2 x float>* %A
7 %tmp2 = load <2 x float>* %B
8 %tmp3 = call <2 x float> @llvm.arm64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
12 define <4 x float> @frecps_4s(<4 x float>* %A, <4 x float>* %B) nounwind {
13 ;CHECK-LABEL: frecps_4s:
15 %tmp1 = load <4 x float>* %A
16 %tmp2 = load <4 x float>* %B
17 %tmp3 = call <4 x float> @llvm.arm64.neon.frecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
21 define <2 x double> @frecps_2d(<2 x double>* %A, <2 x double>* %B) nounwind {
22 ;CHECK-LABEL: frecps_2d:
24 %tmp1 = load <2 x double>* %A
25 %tmp2 = load <2 x double>* %B
26 %tmp3 = call <2 x double> @llvm.arm64.neon.frecps.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
27 ret <2 x double> %tmp3
30 declare <2 x float> @llvm.arm64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
31 declare <4 x float> @llvm.arm64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
32 declare <2 x double> @llvm.arm64.neon.frecps.v2f64(<2 x double>, <2 x double>) nounwind readnone
35 define <2 x float> @frsqrts_2s(<2 x float>* %A, <2 x float>* %B) nounwind {
36 ;CHECK-LABEL: frsqrts_2s:
38 %tmp1 = load <2 x float>* %A
39 %tmp2 = load <2 x float>* %B
40 %tmp3 = call <2 x float> @llvm.arm64.neon.frsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
44 define <4 x float> @frsqrts_4s(<4 x float>* %A, <4 x float>* %B) nounwind {
45 ;CHECK-LABEL: frsqrts_4s:
47 %tmp1 = load <4 x float>* %A
48 %tmp2 = load <4 x float>* %B
49 %tmp3 = call <4 x float> @llvm.arm64.neon.frsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
53 define <2 x double> @frsqrts_2d(<2 x double>* %A, <2 x double>* %B) nounwind {
54 ;CHECK-LABEL: frsqrts_2d:
56 %tmp1 = load <2 x double>* %A
57 %tmp2 = load <2 x double>* %B
58 %tmp3 = call <2 x double> @llvm.arm64.neon.frsqrts.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
59 ret <2 x double> %tmp3
62 declare <2 x float> @llvm.arm64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
63 declare <4 x float> @llvm.arm64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
64 declare <2 x double> @llvm.arm64.neon.frsqrts.v2f64(<2 x double>, <2 x double>) nounwind readnone
66 define <2 x float> @frecpe_2s(<2 x float>* %A) nounwind {
67 ;CHECK-LABEL: frecpe_2s:
69 %tmp1 = load <2 x float>* %A
70 %tmp3 = call <2 x float> @llvm.arm64.neon.frecpe.v2f32(<2 x float> %tmp1)
74 define <4 x float> @frecpe_4s(<4 x float>* %A) nounwind {
75 ;CHECK-LABEL: frecpe_4s:
77 %tmp1 = load <4 x float>* %A
78 %tmp3 = call <4 x float> @llvm.arm64.neon.frecpe.v4f32(<4 x float> %tmp1)
82 define <2 x double> @frecpe_2d(<2 x double>* %A) nounwind {
83 ;CHECK-LABEL: frecpe_2d:
85 %tmp1 = load <2 x double>* %A
86 %tmp3 = call <2 x double> @llvm.arm64.neon.frecpe.v2f64(<2 x double> %tmp1)
87 ret <2 x double> %tmp3
90 declare <2 x float> @llvm.arm64.neon.frecpe.v2f32(<2 x float>) nounwind readnone
91 declare <4 x float> @llvm.arm64.neon.frecpe.v4f32(<4 x float>) nounwind readnone
92 declare <2 x double> @llvm.arm64.neon.frecpe.v2f64(<2 x double>) nounwind readnone
94 define <2 x float> @frsqrte_2s(<2 x float>* %A) nounwind {
95 ;CHECK-LABEL: frsqrte_2s:
97 %tmp1 = load <2 x float>* %A
98 %tmp3 = call <2 x float> @llvm.arm64.neon.frsqrte.v2f32(<2 x float> %tmp1)
102 define <4 x float> @frsqrte_4s(<4 x float>* %A) nounwind {
103 ;CHECK-LABEL: frsqrte_4s:
105 %tmp1 = load <4 x float>* %A
106 %tmp3 = call <4 x float> @llvm.arm64.neon.frsqrte.v4f32(<4 x float> %tmp1)
107 ret <4 x float> %tmp3
110 define <2 x double> @frsqrte_2d(<2 x double>* %A) nounwind {
111 ;CHECK-LABEL: frsqrte_2d:
113 %tmp1 = load <2 x double>* %A
114 %tmp3 = call <2 x double> @llvm.arm64.neon.frsqrte.v2f64(<2 x double> %tmp1)
115 ret <2 x double> %tmp3
118 declare <2 x float> @llvm.arm64.neon.frsqrte.v2f32(<2 x float>) nounwind readnone
119 declare <4 x float> @llvm.arm64.neon.frsqrte.v4f32(<4 x float>) nounwind readnone
120 declare <2 x double> @llvm.arm64.neon.frsqrte.v2f64(<2 x double>) nounwind readnone
122 define <2 x i32> @urecpe_2s(<2 x i32>* %A) nounwind {
123 ;CHECK-LABEL: urecpe_2s:
125 %tmp1 = load <2 x i32>* %A
126 %tmp3 = call <2 x i32> @llvm.arm64.neon.urecpe.v2i32(<2 x i32> %tmp1)
130 define <4 x i32> @urecpe_4s(<4 x i32>* %A) nounwind {
131 ;CHECK-LABEL: urecpe_4s:
133 %tmp1 = load <4 x i32>* %A
134 %tmp3 = call <4 x i32> @llvm.arm64.neon.urecpe.v4i32(<4 x i32> %tmp1)
138 declare <2 x i32> @llvm.arm64.neon.urecpe.v2i32(<2 x i32>) nounwind readnone
139 declare <4 x i32> @llvm.arm64.neon.urecpe.v4i32(<4 x i32>) nounwind readnone
141 define <2 x i32> @ursqrte_2s(<2 x i32>* %A) nounwind {
142 ;CHECK-LABEL: ursqrte_2s:
144 %tmp1 = load <2 x i32>* %A
145 %tmp3 = call <2 x i32> @llvm.arm64.neon.ursqrte.v2i32(<2 x i32> %tmp1)
149 define <4 x i32> @ursqrte_4s(<4 x i32>* %A) nounwind {
150 ;CHECK-LABEL: ursqrte_4s:
152 %tmp1 = load <4 x i32>* %A
153 %tmp3 = call <4 x i32> @llvm.arm64.neon.ursqrte.v4i32(<4 x i32> %tmp1)
157 declare <2 x i32> @llvm.arm64.neon.ursqrte.v2i32(<2 x i32>) nounwind readnone
158 declare <4 x i32> @llvm.arm64.neon.ursqrte.v4i32(<4 x i32>) nounwind readnone
160 define float @f1(float %a, float %b) nounwind readnone optsize ssp {
162 ; CHECK: frsqrts s0, s0, s1
164 %vrsqrtss.i = tail call float @llvm.arm64.neon.frsqrts.f32(float %a, float %b) nounwind
165 ret float %vrsqrtss.i
168 define double @f2(double %a, double %b) nounwind readnone optsize ssp {
170 ; CHECK: frsqrts d0, d0, d1
172 %vrsqrtsd.i = tail call double @llvm.arm64.neon.frsqrts.f64(double %a, double %b) nounwind
173 ret double %vrsqrtsd.i
176 declare double @llvm.arm64.neon.frsqrts.f64(double, double) nounwind readnone
177 declare float @llvm.arm64.neon.frsqrts.f32(float, float) nounwind readnone