1 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
2 ; RUN: grep shlh %t1.s | count 84
3 ; RUN: grep shlhi %t1.s | count 51
4 ; RUN: grep shl %t1.s | count 168
5 ; RUN: grep shli %t1.s | count 51
6 ; RUN: grep xshw %t1.s | count 5
7 ; RUN: grep and %t1.s | count 5
8 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
11 ; Vector shifts are not currently supported in gcc or llvm assembly. These are
14 ; Shift left i16 via register, note that the second operand to shl is promoted
17 define i16 @shlh_i16_1(i16 %arg1, i16 %arg2) {
18 %A = shl i16 %arg1, %arg2
22 define i16 @shlh_i16_2(i16 %arg1, i16 %arg2) {
23 %A = shl i16 %arg2, %arg1
27 define i16 @shlh_i16_3(i16 signext %arg1, i16 signext %arg2) signext {
28 %A = shl i16 %arg1, %arg2
32 define i16 @shlh_i16_4(i16 signext %arg1, i16 signext %arg2) signext {
33 %A = shl i16 %arg2, %arg1
37 define i16 @shlh_i16_5(i16 zeroext %arg1, i16 zeroext %arg2) zeroext {
38 %A = shl i16 %arg1, %arg2
42 define i16 @shlh_i16_6(i16 zeroext %arg1, i16 zeroext %arg2) zeroext {
43 %A = shl i16 %arg2, %arg1
47 ; Shift left i16 with immediate:
48 define i16 @shlhi_i16_1(i16 %arg1) {
49 %A = shl i16 %arg1, 12
53 ; Should not generate anything other than the return, arg1 << 0 = arg1
54 define i16 @shlhi_i16_2(i16 %arg1) {
59 define i16 @shlhi_i16_3(i16 %arg1) {
60 %A = shl i16 16383, %arg1
64 ; Should generate 0, 0 << arg1 = 0
65 define i16 @shlhi_i16_4(i16 %arg1) {
70 define i16 @shlhi_i16_5(i16 signext %arg1) signext {
71 %A = shl i16 %arg1, 12
75 ; Should not generate anything other than the return, arg1 << 0 = arg1
76 define i16 @shlhi_i16_6(i16 signext %arg1) signext {
81 define i16 @shlhi_i16_7(i16 signext %arg1) signext {
82 %A = shl i16 16383, %arg1
86 ; Should generate 0, 0 << arg1 = 0
87 define i16 @shlhi_i16_8(i16 signext %arg1) signext {
92 define i16 @shlhi_i16_9(i16 zeroext %arg1) zeroext {
93 %A = shl i16 %arg1, 12
97 ; Should not generate anything other than the return, arg1 << 0 = arg1
98 define i16 @shlhi_i16_10(i16 zeroext %arg1) zeroext {
103 define i16 @shlhi_i16_11(i16 zeroext %arg1) zeroext {
104 %A = shl i16 16383, %arg1
108 ; Should generate 0, 0 << arg1 = 0
109 define i16 @shlhi_i16_12(i16 zeroext %arg1) zeroext {
110 %A = shl i16 0, %arg1
114 ; Shift left i32 via register, note that the second operand to shl is promoted
117 define i32 @shl_i32_1(i32 %arg1, i32 %arg2) {
118 %A = shl i32 %arg1, %arg2
122 define i32 @shl_i32_2(i32 %arg1, i32 %arg2) {
123 %A = shl i32 %arg2, %arg1
127 define i32 @shl_i32_3(i32 signext %arg1, i32 signext %arg2) signext {
128 %A = shl i32 %arg1, %arg2
132 define i32 @shl_i32_4(i32 signext %arg1, i32 signext %arg2) signext {
133 %A = shl i32 %arg2, %arg1
137 define i32 @shl_i32_5(i32 zeroext %arg1, i32 zeroext %arg2) zeroext {
138 %A = shl i32 %arg1, %arg2
142 define i32 @shl_i32_6(i32 zeroext %arg1, i32 zeroext %arg2) zeroext {
143 %A = shl i32 %arg2, %arg1
147 ; Shift left i32 with immediate:
148 define i32 @shli_i32_1(i32 %arg1) {
149 %A = shl i32 %arg1, 12
153 ; Should not generate anything other than the return, arg1 << 0 = arg1
154 define i32 @shli_i32_2(i32 %arg1) {
155 %A = shl i32 %arg1, 0
159 define i32 @shli_i32_3(i32 %arg1) {
160 %A = shl i32 16383, %arg1
164 ; Should generate 0, 0 << arg1 = 0
165 define i32 @shli_i32_4(i32 %arg1) {
166 %A = shl i32 0, %arg1
170 define i32 @shli_i32_5(i32 signext %arg1) signext {
171 %A = shl i32 %arg1, 12
175 ; Should not generate anything other than the return, arg1 << 0 = arg1
176 define i32 @shli_i32_6(i32 signext %arg1) signext {
177 %A = shl i32 %arg1, 0
181 define i32 @shli_i32_7(i32 signext %arg1) signext {
182 %A = shl i32 16383, %arg1
186 ; Should generate 0, 0 << arg1 = 0
187 define i32 @shli_i32_8(i32 signext %arg1) signext {
188 %A = shl i32 0, %arg1
192 define i32 @shli_i32_9(i32 zeroext %arg1) zeroext {
193 %A = shl i32 %arg1, 12
197 ; Should not generate anything other than the return, arg1 << 0 = arg1
198 define i32 @shli_i32_10(i32 zeroext %arg1) zeroext {
199 %A = shl i32 %arg1, 0
203 define i32 @shli_i32_11(i32 zeroext %arg1) zeroext {
204 %A = shl i32 16383, %arg1
208 ; Should generate 0, 0 << arg1 = 0
209 define i32 @shli_i32_12(i32 zeroext %arg1) zeroext {
210 %A = shl i32 0, %arg1