1 ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
2 ; RUN: grep shufb %t1.s | count 10
3 ; RUN: grep {ilhu.*1799} %t1.s | count 1
4 ; RUN: grep {ilhu.*771} %t1.s | count 1
5 ; RUN: grep {ilhu.*1543} %t1.s | count 1
6 ; RUN: grep {ilhu.*1029} %t1.s | count 1
7 ; RUN: grep {ilhu.*515} %t1.s | count 2
8 ; RUN: grep xsbh %t1.s | count 2
9 ; RUN: grep sfh %t1.s | count 1
11 ; ModuleID = 'trunc.bc'
12 target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
15 ; codegen for i128 arguments is not implemented yet on CellSPU
16 ; once this changes uncomment the functions below
17 ; and update the expected results accordingly
19 ;define i8 @trunc_i128_i8(i128 %u) nounwind readnone {
21 ; %0 = trunc i128 %u to i8
24 ;define i16 @trunc_i128_i16(i128 %u) nounwind readnone {
26 ; %0 = trunc i128 %u to i16
29 ;define i32 @trunc_i128_i32(i128 %u) nounwind readnone {
31 ; %0 = trunc i128 %u to i32
34 ;define i64 @trunc_i128_i64(i128 %u) nounwind readnone {
36 ; %0 = trunc i128 %u to i64
40 define <16 x i8> @trunc_i64_i8(i64 %u, <16 x i8> %v) nounwind readnone {
42 %0 = trunc i64 %u to i8
43 %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 10
46 define <8 x i16> @trunc_i64_i16(i64 %u, <8 x i16> %v) nounwind readnone {
48 %0 = trunc i64 %u to i16
49 %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 6
52 define i32 @trunc_i64_i32(i64 %u, i32 %v) nounwind readnone {
54 %0 = trunc i64 %u to i32
58 define i8 @trunc_i32_i8(i32 %u, i8 %v) nounwind readnone {
60 %0 = trunc i32 %u to i8
64 define <8 x i16> @trunc_i32_i16(i32 %u, <8 x i16> %v) nounwind readnone {
66 %0 = trunc i32 %u to i16
67 %tmp1 = insertelement <8 x i16> %v, i16 %0, i32 3
71 define <16 x i8> @trunc_i16_i8(i16 %u, <16 x i8> %v) nounwind readnone {
73 %0 = trunc i16 %u to i8
74 %tmp1 = insertelement <16 x i8> %v, i8 %0, i32 5