1 ; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
3 ; CHECK-DAG: ct0({{r[0-9]*:[0-9]*}})
4 ; CHECK-DAG: cl0({{r[0-9]*:[0-9]*}})
5 ; CHECK-DAG: ct0({{r[0-9]*}})
6 ; CHECK-DAG: cl0({{r[0-9]*}})
7 ; CHECK-DAG: r{{[0-9]+}} += lsr(r{{[0-9]+}}, #4)
9 define i32 @foo(i64 %a, i32 %b) nounwind {
11 %tmp0 = tail call i64 @llvm.ctlz.i64( i64 %a, i1 true )
12 %tmp1 = tail call i64 @llvm.cttz.i64( i64 %a, i1 true )
13 %tmp2 = tail call i32 @llvm.ctlz.i32( i32 %b, i1 true )
14 %tmp3 = tail call i32 @llvm.cttz.i32( i32 %b, i1 true )
15 %tmp4 = tail call i64 @llvm.ctpop.i64( i64 %a )
16 %tmp5 = tail call i32 @llvm.ctpop.i32( i32 %b )
19 %tmp6 = trunc i64 %tmp0 to i32
20 %tmp7 = trunc i64 %tmp1 to i32
21 %tmp8 = trunc i64 %tmp4 to i32
22 %tmp9 = add i32 %tmp6, %tmp7
23 %tmp10 = add i32 %tmp9, %tmp8
24 %tmp11 = add i32 %tmp10, %tmp2
25 %tmp12 = add i32 %tmp11, %tmp3
26 %tmp13 = add i32 %tmp12, %tmp5
31 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
32 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
33 declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
34 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
35 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
36 declare i32 @llvm.ctpop.i32(i32) nounwind readnone