Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
[oota-llvm.git] / test / CodeGen / Mips / 2008-08-06-Alloca.ll
1 ; RUN: llc < %s -march=mips -regalloc=linearscan | grep {subu.*sp} | count 2
2
3 ; This test depends on a linearscan optimization, joining copies from reserved
4 ; registers.
5 ; After coalescing, copies from %SP remain.
6 ; They are handled by RALinScan::attemptTrivialCoalescing
7
8 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
9 target triple = "mipsallegrexel-unknown-psp-elf"
10
11 define i32 @twoalloca(i32 %size) nounwind {
12 entry:
13         alloca i8, i32 %size            ; <i8*>:0 [#uses=1]
14         alloca i8, i32 %size            ; <i8*>:1 [#uses=1]
15         call i32 @foo( i8* %0 ) nounwind                ; <i32>:2 [#uses=1]
16         call i32 @foo( i8* %1 ) nounwind                ; <i32>:3 [#uses=1]
17         add i32 %3, %2          ; <i32>:4 [#uses=1]
18         ret i32 %4
19 }
20
21 declare i32 @foo(i8*)