1 ; RUN: llc < %s -march=mips -relocation-model=static | \
2 ; RUN: FileCheck %s -check-prefix=STATIC-O32
3 ; RUN: llc < %s -march=mips -relocation-model=pic | \
4 ; RUN: FileCheck %s -check-prefix=PIC-O32
5 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 | \
6 ; RUN: FileCheck %s -check-prefix=N64
7 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips64 | \
8 ; RUN: FileCheck %s -check-prefix=N64
10 define i32 @main() nounwind readnone {
12 %x = alloca i32, align 4 ; <i32*> [#uses=2]
13 store volatile i32 2, i32* %x, align 4
14 %0 = load volatile i32* %x, align 4 ; <i32> [#uses=1]
15 ; STATIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
16 ; STATIC-O32: lui $[[R1:[0-9]+]], %hi($JTI0_0)
17 ; STATIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
18 ; STATIC-O32: lw $[[R3:[0-9]+]], %lo($JTI0_0)($[[R2]])
19 ; PIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
20 ; PIC-O32: lw $[[R1:[0-9]+]], %got($JTI0_0)
21 ; PIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
22 ; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]])
23 ; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
25 ; N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 3
26 ; N64: ld $[[R1:[0-9]+]], %got_page($JTI0_0)
27 ; N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]]
28 ; N64: ld $[[R4:[0-9]+]], %got_ofst($JTI0_0)($[[R2]])
29 ; N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
31 switch i32 %0, label %bb4 [
54 ; STATIC-O32: .align 2
55 ; STATIC-O32: $JTI0_0: