1 ; RUN: llc < %s -march=mips -relocation-model=static | \
2 ; RUN: FileCheck %s -check-prefix=STATIC-O32
3 ; RUN: llc < %s -march=mips -relocation-model=pic | \
4 ; RUN: FileCheck %s -check-prefix=PIC-O32
5 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips4 | \
6 ; RUN: FileCheck %s -check-prefix=N64
7 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips4 | \
8 ; RUN: FileCheck %s -check-prefix=N64
9 ; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 | \
10 ; RUN: FileCheck %s -check-prefix=N64
11 ; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips64 | \
12 ; RUN: FileCheck %s -check-prefix=N64
14 define i32 @main() nounwind readnone {
16 %x = alloca i32, align 4 ; <i32*> [#uses=2]
17 store volatile i32 2, i32* %x, align 4
18 %0 = load volatile i32, i32* %x, align 4 ; <i32> [#uses=1]
19 ; STATIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
20 ; STATIC-O32: lui $[[R1:[0-9]+]], %hi($JTI0_0)
21 ; STATIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
22 ; STATIC-O32: lw $[[R3:[0-9]+]], %lo($JTI0_0)($[[R2]])
23 ; PIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
24 ; PIC-O32: lw $[[R1:[0-9]+]], %got($JTI0_0)
25 ; PIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
26 ; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]])
27 ; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
29 ; N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 3
30 ; N64: ld $[[R1:[0-9]+]], %got_page($JTI0_0)
31 ; N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]]
32 ; N64: ld $[[R4:[0-9]+]], %got_ofst($JTI0_0)($[[R2]])
33 ; N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
35 switch i32 %0, label %bb4 [
58 ; STATIC-O32: .align 2
59 ; STATIC-O32: $JTI0_0: