1 ; RUN: llc -march=mipsel -mcpu=mips32 -O0 \
2 ; RUN: -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \
3 ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R1
4 ; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 \
5 ; RUN: -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \
6 ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R2
13 ; ALL-DAG: addiu $4, $zero, 10
14 ; ALL-DAG: lw $25, %got(xi)(${{[0-9]+}})
20 declare void @xii(i32, i32)
25 ; ALL-DAG: addiu $4, $zero, 746
26 ; ALL-DAG: addiu $5, $zero, 892
27 ; ALL-DAG: lw $25, %got(xii)(${{[0-9]+}})
29 call void @xii(i32 746, i32 892)
33 declare void @xiii(i32, i32, i32)
35 define void @cxiii() {
38 ; ALL-DAG: addiu $4, $zero, 88
39 ; ALL-DAG: addiu $5, $zero, 44
40 ; ALL-DAG: addiu $6, $zero, 11
41 ; ALL-DAG: lw $25, %got(xiii)(${{[0-9]+}})
43 call void @xiii(i32 88, i32 44, i32 11)
47 declare void @xiiii(i32, i32, i32, i32)
49 define void @cxiiii() {
52 ; ALL-DAG: addiu $4, $zero, 167
53 ; ALL-DAG: addiu $5, $zero, 320
54 ; ALL-DAG: addiu $6, $zero, 97
55 ; ALL-DAG: addiu $7, $zero, 14
56 ; ALL-DAG: lw $25, %got(xiiii)(${{[0-9]+}})
58 call void @xiiii(i32 167, i32 320, i32 97, i32 14)
62 @c1 = global i8 -45, align 1
63 @uc1 = global i8 27, align 1
64 @s1 = global i16 -1789, align 2
65 @us1 = global i16 1256, align 2
67 define void @cxiiiiconv() {
68 ; ALL-LABEL: cxiiiiconv:
70 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
71 ; ALL-DAG: lw $[[REG_C1_ADDR:[0-9]+]], %got(c1)($[[REG_GP]])
72 ; ALL-DAG: lbu $[[REG_C1:[0-9]+]], 0($[[REG_C1_ADDR]])
73 ; 32R1-DAG: sll $[[REG_C1_1:[0-9]+]], $[[REG_C1]], 24
74 ; 32R1-DAG: sra $4, $[[REG_C1_1]], 24
75 ; 32R2-DAG: seb $4, $[[REG_C1]]
76 ; FIXME: andi is superfulous
77 ; ALL-DAG: lw $[[REG_UC1_ADDR:[0-9]+]], %got(uc1)($[[REG_GP]])
78 ; ALL-DAG: lbu $[[REG_UC1:[0-9]+]], 0($[[REG_UC1_ADDR]])
79 ; ALL-DAG: andi $5, $[[REG_UC1]], 255
80 ; ALL-DAG: lw $[[REG_S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]])
81 ; ALL-DAG: lhu $[[REG_S1:[0-9]+]], 0($[[REG_S1_ADDR]])
82 ; 32R1-DAG: sll $[[REG_S1_1:[0-9]+]], $[[REG_S1]], 16
83 ; 32R1-DAG: sra $6, $[[REG_S1_1]], 16
84 ; 32R2-DAG: seh $6, $[[REG_S1]]
85 ; FIXME andi is superfulous
86 ; ALL-DAG: lw $[[REG_US1_ADDR:[0-9]+]], %got(us1)($[[REG_GP]])
87 ; ALL-DAG: lhu $[[REG_US1:[0-9]+]], 0($[[REG_US1_ADDR]])
88 ; ALL-DAG: andi $7, $[[REG_US1]], 65535
90 %1 = load i8, i8* @c1, align 1
91 %conv = sext i8 %1 to i32
92 %2 = load i8, i8* @uc1, align 1
93 %conv1 = zext i8 %2 to i32
94 %3 = load i16, i16* @s1, align 2
95 %conv2 = sext i16 %3 to i32
96 %4 = load i16, i16* @us1, align 2
97 %conv3 = zext i16 %4 to i32
98 call void @xiiii(i32 %conv, i32 %conv1, i32 %conv2, i32 %conv3)
102 declare void @xf(float)
107 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
108 ; ALL: lui $[[REG_FPCONST_1:[0-9]+]], 17886
109 ; ALL: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 17067
110 ; ALL: mtc1 $[[REG_FPCONST]], $f12
111 ; ALL: lw $25, %got(xf)($[[REG_GP]])
113 call void @xf(float 0x40BBC85560000000)
117 declare void @xff(float, float)
119 define void @cxff() {
122 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
123 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 16314
124 ; ALL-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 21349
125 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
126 ; ALL-DAG: lui $[[REG_FPCONST_2:[0-9]+]], 16593
127 ; ALL-DAG: ori $[[REG_FPCONST_3:[0-9]+]], $[[REG_FPCONST_2]], 24642
128 ; ALL-DAG: mtc1 $[[REG_FPCONST_3]], $f14
129 ; ALL-DAG: lw $25, %got(xff)($[[REG_GP]])
131 call void @xff(float 0x3FF74A6CA0000000, float 0x401A2C0840000000)
135 declare void @xfi(float, i32)
137 define void @cxfi() {
140 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
141 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 16540
142 ; ALL-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 33554
143 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
144 ; ALL-DAG: addiu $5, $zero, 102
145 ; ALL-DAG: lw $25, %got(xfi)($[[REG_GP]])
147 call void @xfi(float 0x4013906240000000, i32 102)
151 declare void @xfii(float, i32, i32)
153 define void @cxfii() {
156 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
157 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 17142
158 ; ALL-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 16240
159 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
160 ; ALL-DAG: addiu $5, $zero, 9993
161 ; ALL-DAG: addiu $6, $zero, 10922
162 ; ALL-DAG: lw $25, %got(xfii)($[[REG_GP]])
164 call void @xfii(float 0x405EC7EE00000000, i32 9993, i32 10922)
168 declare void @xfiii(float, i32, i32, i32)
170 define void @cxfiii() {
173 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
174 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 17120
175 ; ALL-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 14681
176 ; ALL-DAG: mtc1 $[[REG_FPCONST]], $f12
177 ; ALL-DAG: addiu $5, $zero, 3948
178 ; ALL-DAG: lui $[[REG_I_1:[0-9]+]], 1
179 ; ALL-DAG: ori $6, $[[REG_I_1]], 23475
180 ; ALL-DAG: lui $[[REG_I_2:[0-9]+]], 1
181 ; ALL-DAG: ori $7, $[[REG_I_2]], 45686
182 ; ALL-DAG: lw $25, %got(xfiii)($[[REG_GP]])
184 call void @xfiii(float 0x405C072B20000000, i32 3948, i32 89011, i32 111222)
188 declare void @xd(double)
193 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
194 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 16514
195 ; ALL-DAG: ori $[[REG_FPCONST_2:[0-9]+]], $[[REG_FPCONST_1]], 48037
196 ; ALL-DAG: lui $[[REG_FPCONST_3:[0-9]+]], 58195
197 ; ALL-DAG: ori $[[REG_FPCONST_4:[0-9]+]], $[[REG_FPCONST_3]], 63439
198 ; ALL-DAG: mtc1 $[[REG_FPCONST_4]], $f12
199 ; 32R1-DAG: mtc1 $[[REG_FPCONST_2]], $f13
200 ; 32R2-DAG: mthc1 $[[REG_FPCONST_2]], $f12
201 ; ALL-DAG: lw $25, %got(xd)($[[REG_GP]])
203 call void @xd(double 5.994560e+02)
207 declare void @xdd(double, double)
209 define void @cxdd() {
212 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
213 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 16531
214 ; ALL-DAG: ori $[[REG_FPCONST_2:[0-9]+]], $[[REG_FPCONST_1]], 19435
215 ; ALL-DAG: lui $[[REG_FPCONST_3:[0-9]+]], 34078
216 ; ALL-DAG: ori $[[REG_FPCONST_4:[0-9]+]], $[[REG_FPCONST_3]], 47186
217 ; ALL-DAG: mtc1 $[[REG_FPCONST_4]], $f12
218 ; 32R1-DAG: mtc1 $[[REG_FPCONST_2]], $f13
219 ; 32R2-DAG: mthc1 $[[REG_FPCONST_2]], $f12
220 ; ALL-DAG: lui $[[REG_FPCONST_1:[0-9]+]], 16629
221 ; ALL-DAG: ori $[[REG_FPCONST_2:[0-9]+]], $[[REG_FPCONST_1]], 45873
222 ; ALL-DAG: lui $[[REG_FPCONST_3:[0-9]+]], 63438
223 ; ALL-DAG: ori $[[REG_FPCONST_4:[0-9]+]], $[[REG_FPCONST_3]], 55575
224 ; ALL-DAG: mtc1 $[[REG_FPCONST_4]], $f14
225 ; 32R1-DAG: mtc1 $[[REG_FPCONST_2]], $f15
226 ; 32R2-DAG: mthc1 $[[REG_FPCONST_2]], $f14
227 ; ALL-DAG: lw $25, %got(xdd)($[[REG_GP]])
229 call void @xdd(double 1.234980e+03, double 0x40F5B331F7CED917)
233 declare void @xif(i32, float)
235 define void @cxif() {
238 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
239 ; ALL-DAG: addiu $4, $zero, 345
240 ; ALL-DAG: lui $[[REGF_1:[0-9]+]], 17374
241 ; ALL-DAG: ori $[[REGF_2:[0-9]+]], $[[REGF_1]], 29393
242 ; ALL-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
243 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
244 ; ALL-DAG: lw $25, %got(xif)($[[REG_GP]])
246 call void @xif(i32 345, float 0x407BCE5A20000000)
250 declare void @xiff(i32, float, float)
252 define void @cxiff() {
255 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
256 ; ALL-DAG: addiu $4, $zero, 12239
257 ; ALL-DAG: lui $[[REGF0_1:[0-9]+]], 17526
258 ; ALL-DAG: ori $[[REGF0_2:[0-9]+]], $[[REGF0_1]], 55706
259 ; ALL-DAG: mtc1 $[[REGF0_2]], $f[[REGF0_3:[0-9]+]]
260 ; ALL-DAG: lui $[[REGF1_1:[0-9]+]], 16543
261 ; ALL-DAG: ori $[[REGF1_2:[0-9]+]], $[[REGF1_1]], 65326
262 ; ALL: mtc1 $[[REGF1_2]], $f[[REGF1_3:[0-9]+]]
263 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
264 ; ALL-DAG: mfc1 $6, $f[[REGF1_3]]
265 ; ALL-DAG: lw $25, %got(xiff)($[[REG_GP]])
267 call void @xiff(i32 12239, float 0x408EDB3340000000, float 0x4013FFE5C0000000)
271 declare void @xifi(i32, float, i32)
273 define void @cxifi() {
276 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
277 ; ALL-DAG: addiu $4, $zero, 887
278 ; ALL-DAG: lui $[[REGF_1:[0-9]+]], 16659
279 ; ALL-DAG: ori $[[REGF_2:[0-9]+]], $[[REGF_1]], 48759
280 ; ALL-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
281 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
282 ; ALL-DAG: addiu $6, $zero, 888
283 ; ALL-DAG: lw $25, %got(xifi)($[[REG_GP]])
285 call void @xifi(i32 887, float 0x402277CEE0000000, i32 888)
289 declare void @xifif(i32, float, i32, float)
291 define void @cxifif() {
294 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
295 ; ALL-DAG: lui $[[REGI:[0-9]+]], 1
296 ; ALL-DAG: ori $4, $[[REGI]], 2238
297 ; ALL-DAG: lui $[[REGF0_1:[0-9]+]], 17527
298 ; ALL-DAG: ori $[[REGF0_2:[0-9]+]], $[[REGF0_1]], 2015
299 ; ALL-DAG: mtc1 $[[REGF0_2]], $f[[REGF0_3:[0-9]+]]
300 ; ALL-DAG: addiu $6, $zero, 9991
301 ; ALL-DAG: lui $[[REGF1_1:[0-9]+]], 17802
302 ; ALL-DAG: ori $[[REGF1_2:[0-9]+]], $[[REGF1_1]], 58470
303 ; ALL: mtc1 $[[REGF1_2]], $f[[REGF1_3:[0-9]+]]
304 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
305 ; ALL-DAG: mfc1 $7, $f[[REGF1_3]]
306 ; ALL-DAG: lw $25, %got(xifif)($[[REG_GP]])
308 call void @xifif(i32 67774, float 0x408EE0FBE0000000,
309 i32 9991, float 0x40B15C8CC0000000)
313 declare void @xiffi(i32, float, float, i32)
315 define void @cxiffi() {
318 ; ALL: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
319 ; ALL-DAG: addiu $4, $zero, 45
320 ; ALL-DAG: lui $[[REGF0_1:[0-9]+]], 16307
321 ; ALL-DAG: ori $[[REGF0_2:[0-9]+]], $[[REGF0_1]], 13107
322 ; ALL-DAG: mtc1 $[[REGF0_2]], $f[[REGF0_3:[0-9]+]]
323 ; ALL-DAG: lui $[[REGF1_1:[0-9]+]], 17529
324 ; ALL-DAG: ori $[[REGF1_2:[0-9]+]], $[[REGF1_1]], 39322
325 ; ALL: mtc1 $[[REGF1_2]], $f[[REGF1_3:[0-9]+]]
326 ; ALL-DAG: addiu $7, $zero, 234
327 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
328 ; ALL-DAG: mfc1 $6, $f[[REGF1_3]]
329 ; ALL-DAG: lw $25, %got(xiffi)($[[REG_GP]])
331 call void @xiffi(i32 45, float 0x3FF6666660000000,
332 float 0x408F333340000000, i32 234)
336 declare void @xifii(i32, float, i32, i32)
338 define void @cxifii() {
341 ; ALL-DAG: addu $[[REG_GP:[0-9]+]], ${{[0-9]+}}, ${{[0-9+]}}
342 ; ALL-DAG: addiu $4, $zero, 12239
343 ; ALL-DAG: lui $[[REGF_1:[0-9]+]], 17526
344 ; ALL-DAG: ori $[[REGF_2:[0-9]+]], $[[REGF_1]], 55706
345 ; ALL-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
346 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
347 ; ALL-DAG: lui $[[REGI2:[0-9]+]], 15
348 ; ALL-DAG: ori $6, $[[REGI2]], 15837
349 ; ALL-DAG: addiu $7, $zero, 1234
350 ; ALL-DAG: lw $25, %got(xifii)($[[REG_GP]])
352 call void @xifii(i32 12239, float 0x408EDB3340000000, i32 998877, i32 1234)