1 ; RUN: llc -march=mipsel -O0 < %s | FileCheck %s -check-prefix=None
2 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=Default
3 ; RUN: llc -march=mipsel -O1 -relocation-model=static < %s | \
4 ; RUN: FileCheck %s -check-prefix=STATICO1
5 ; RUN: llc -march=mipsel -disable-mips-df-forward-search=false \
6 ; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=FORWARD
7 ; RUN: llc -march=mipsel -disable-mips-df-backward-search \
8 ; RUN: -disable-mips-df-succbb-search=false < %s | \
9 ; RUN: FileCheck %s -check-prefix=SUCCBB
11 define void @foo1() nounwind {
24 tail call void @foo2(i32 3) nounwind
28 declare void @foo2(i32)
30 ; Check that cvt.d.w goes into jalr's delay slot.
32 define void @foo3(i32 %a) nounwind {
34 ; Default-LABEL: foo3:
38 %conv = sitofp i32 %a to double
39 tail call void @foo4(double %conv) nounwind
43 declare void @foo4(double)
45 @g2 = external global i32
46 @g1 = external global i32
47 @g3 = external global i32
49 ; Check that branch delay slot can be filled with an instruction with operand
52 ; Default-LABEL: foo5:
55 define void @foo5(i32 %a) nounwind {
57 %0 = load i32* @g2, align 4
58 %tobool = icmp eq i32 %a, 0
59 br i1 %tobool, label %if.else, label %if.then
62 %1 = load i32* @g1, align 4
63 %add = add nsw i32 %1, %0
64 store i32 %add, i32* @g1, align 4
68 %2 = load i32* @g3, align 4
69 %sub = sub nsw i32 %2, %0
70 store i32 %sub, i32* @g3, align 4
77 ; Check that delay slot filler can place mov.s or mov.d in delay slot.
79 ; Default-LABEL: foo6:
83 define void @foo6(float %a0, double %a1) nounwind {
85 tail call void @foo7(double %a1, float %a0) nounwind
89 declare void @foo7(double, float)
91 ; Check that a store can move past other memory instructions.
93 ; STATICO1-LABEL: foo8:
94 ; STATICO1: jalr ${{[0-9]+}}
95 ; STATICO1-NEXT: sw ${{[0-9]+}}, %lo(g1)
97 @foo9 = common global void ()* null, align 4
99 define i32 @foo8(i32 %a) nounwind {
101 store i32 %a, i32* @g1, align 4
102 %0 = load void ()** @foo9, align 4
103 tail call void %0() nounwind
104 %1 = load i32* @g1, align 4
105 %add = add nsw i32 %1, %a
109 ; Test searchForward. Check that the second jal's slot is filled with another
110 ; instruction in the same block.
112 ; FORWARD-LABEL: foo10:
118 define void @foo10() nounwind {
120 tail call void @foo11() nounwind
121 tail call void @foo11() nounwind
122 store i32 0, i32* @g1, align 4
123 tail call void @foo11() nounwind
124 store i32 0, i32* @g1, align 4
128 declare void @foo11()
130 ; Check that delay slots of branches in both the entry block and loop body are
133 ; SUCCBB-LABEL: succbbs_loop1:
134 ; SUCCBB: blez $5, $BB
136 ; SUCCBB: bne ${{[0-9]+}}, $zero, $BB
139 define i32 @succbbs_loop1(i32* nocapture %a, i32 %n) {
141 %cmp4 = icmp sgt i32 %n, 0
142 br i1 %cmp4, label %for.body, label %for.end
144 for.body: ; preds = %entry, %for.body
145 %s.06 = phi i32 [ %add, %for.body ], [ 0, %entry ]
146 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
147 %arrayidx = getelementptr inbounds i32* %a, i32 %i.05
148 %0 = load i32* %arrayidx, align 4
149 %add = add nsw i32 %0, %s.06
150 %inc = add nsw i32 %i.05, 1
151 %exitcond = icmp eq i32 %inc, %n
152 br i1 %exitcond, label %for.end, label %for.body
154 for.end: ; preds = %for.body, %entry
155 %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
159 ; Check that the first branch has its slot filled.
161 ; SUCCBB-LABEL: succbbs_br1:
162 ; SUCCBB: beq ${{[0-9]+}}, $zero, $BB
163 ; SUCCBB-NEXT: lw $25, %call16(foo100)
165 define void @succbbs_br1(i32 %a) {
167 %tobool = icmp eq i32 %a, 0
168 br i1 %tobool, label %if.end, label %if.then
170 if.then: ; preds = %entry
171 tail call void @foo100() #1
174 if.end: ; preds = %entry, %if.then
178 declare void @foo100()