1 ; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 --check-prefix=O32BE %s
2 ; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 --check-prefix=O32LE %s
4 ; RUN-TODO: llc -march=mips64 -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 %s
5 ; RUN-TODO: llc -march=mips64el -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32 %s
7 ; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=NEW %s
8 ; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=NEW %s
10 ; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=NEW %s
11 ; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=NEW %s
13 ; Test the integer arguments for all ABI's and byte orders as specified by
14 ; section 5 of MD00305 (MIPS ABIs Described).
16 ; N32/N64 are identical in this area so their checks have been combined into
17 ; the 'NEW' prefix (the N stands for New).
19 ; Varargs are covered in arguments-hard-float-varargs.ll.
21 @bytes = global [11 x i8] zeroinitializer
22 @dwords = global [11 x i64] zeroinitializer
23 @floats = global [11 x float] zeroinitializer
24 @doubles = global [11 x double] zeroinitializer
26 define void @align_to_arg_slots(i8 %a, i8 %b, i8 %c, i8 %d, i8 %e, i8 %f, i8 %g,
27 i8 %h, i8 %i, i8 %j) nounwind {
29 %0 = getelementptr [11 x i8]* @bytes, i32 0, i32 1
30 store volatile i8 %a, i8* %0
31 %1 = getelementptr [11 x i8]* @bytes, i32 0, i32 2
32 store volatile i8 %b, i8* %1
33 %2 = getelementptr [11 x i8]* @bytes, i32 0, i32 3
34 store volatile i8 %c, i8* %2
35 %3 = getelementptr [11 x i8]* @bytes, i32 0, i32 4
36 store volatile i8 %d, i8* %3
37 %4 = getelementptr [11 x i8]* @bytes, i32 0, i32 5
38 store volatile i8 %e, i8* %4
39 %5 = getelementptr [11 x i8]* @bytes, i32 0, i32 6
40 store volatile i8 %f, i8* %5
41 %6 = getelementptr [11 x i8]* @bytes, i32 0, i32 7
42 store volatile i8 %g, i8* %6
43 %7 = getelementptr [11 x i8]* @bytes, i32 0, i32 8
44 store volatile i8 %h, i8* %7
45 %8 = getelementptr [11 x i8]* @bytes, i32 0, i32 9
46 store volatile i8 %i, i8* %8
47 %9 = getelementptr [11 x i8]* @bytes, i32 0, i32 10
48 store volatile i8 %j, i8* %9
52 ; ALL-LABEL: align_to_arg_slots:
53 ; We won't test the way the global address is calculated in this test. This is
54 ; just to get the register number for the other checks.
55 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
56 ; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
58 ; The first four arguments are the same in O32/N32/N64
59 ; ALL-DAG: sb $4, 1([[R1]])
60 ; ALL-DAG: sb $5, 2([[R1]])
61 ; ALL-DAG: sb $6, 3([[R1]])
62 ; ALL-DAG: sb $7, 4([[R1]])
64 ; N32/N64 get an extra four arguments in registers
65 ; O32 starts loading from the stack. The addresses start at 16 because space is
66 ; always reserved for the first four arguments.
67 ; O32-DAG: lw [[R3:\$[0-9]+]], 16($sp)
68 ; O32-DAG: sb [[R3]], 5([[R1]])
69 ; NEW-DAG: sb $8, 5([[R1]])
70 ; O32-DAG: lw [[R3:\$[0-9]+]], 20($sp)
71 ; O32-DAG: sb [[R3]], 6([[R1]])
72 ; NEW-DAG: sb $9, 6([[R1]])
73 ; O32-DAG: lw [[R3:\$[0-9]+]], 24($sp)
74 ; O32-DAG: sb [[R3]], 7([[R1]])
75 ; NEW-DAG: sb $10, 7([[R1]])
76 ; O32-DAG: lw [[R3:\$[0-9]+]], 28($sp)
77 ; O32-DAG: sb [[R3]], 8([[R1]])
78 ; NEW-DAG: sb $11, 8([[R1]])
80 ; O32/N32/N64 are accessing the stack at this point.
81 ; Unlike O32, N32/N64 do not reserve space for the arguments.
82 ; increase by 4 for O32 and 8 for N32/N64.
83 ; O32-DAG: lw [[R3:\$[0-9]+]], 32($sp)
84 ; O32-DAG: sb [[R3]], 9([[R1]])
85 ; NEW-DAG: lw [[R3:\$[0-9]+]], 0($sp)
86 ; NEW-DAG: sb [[R3]], 9([[R1]])
87 ; O32-DAG: lw [[R3:\$[0-9]+]], 36($sp)
88 ; O32-DAG: sb [[R3]], 10([[R1]])
89 ; NEW-DAG: lw [[R3:\$[0-9]+]], 8($sp)
90 ; NEW-DAG: sb [[R3]], 10([[R1]])
92 define void @slot_skipping(i8 %a, i64 %b, i8 %c, i8 %d,
93 i8 %e, i8 %f, i8 %g, i64 %i, i8 %j) nounwind {
95 %0 = getelementptr [11 x i8]* @bytes, i32 0, i32 1
96 store volatile i8 %a, i8* %0
97 %1 = getelementptr [11 x i64]* @dwords, i32 0, i32 1
98 store volatile i64 %b, i64* %1
99 %2 = getelementptr [11 x i8]* @bytes, i32 0, i32 2
100 store volatile i8 %c, i8* %2
101 %3 = getelementptr [11 x i8]* @bytes, i32 0, i32 3
102 store volatile i8 %d, i8* %3
103 %4 = getelementptr [11 x i8]* @bytes, i32 0, i32 4
104 store volatile i8 %e, i8* %4
105 %5 = getelementptr [11 x i8]* @bytes, i32 0, i32 5
106 store volatile i8 %f, i8* %5
107 %6 = getelementptr [11 x i8]* @bytes, i32 0, i32 6
108 store volatile i8 %g, i8* %6
109 %7 = getelementptr [11 x i64]* @dwords, i32 0, i32 2
110 store volatile i64 %i, i64* %7
111 %8 = getelementptr [11 x i8]* @bytes, i32 0, i32 7
112 store volatile i8 %j, i8* %8
116 ; ALL-LABEL: slot_skipping:
117 ; We won't test the way the global address is calculated in this test. This is
118 ; just to get the register number for the other checks.
119 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
120 ; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
121 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
122 ; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(dwords)(
124 ; The first argument is the same in O32/N32/N64.
125 ; ALL-DAG: sb $4, 1([[R1]])
127 ; The second slot is insufficiently aligned for i64 on O32 so it is skipped.
128 ; Also, i64 occupies two slots on O32 and only one for N32/N64.
129 ; O32-DAG: sw $6, 8([[R2]])
130 ; O32-DAG: sw $7, 12([[R2]])
131 ; NEW-DAG: sd $5, 8([[R2]])
133 ; N32/N64 get an extra four arguments in registers and still have two left from
135 ; O32 starts loading from the stack. The addresses start at 16 because space is
136 ; always reserved for the first four arguments.
137 ; It's not clear why O32 uses lbu for this argument, but it's not wrong so we'll
138 ; accept it for now. The only IR difference is that this argument has
139 ; anyext from i8 and align 8 on it.
140 ; O32LE-DAG: lbu [[R3:\$[0-9]+]], 16($sp)
141 ; O32BE-DAG: lbu [[R3:\$[0-9]+]], 19($sp)
142 ; O32-DAG: sb [[R3]], 2([[R1]])
143 ; NEW-DAG: sb $6, 2([[R1]])
144 ; O32-DAG: lw [[R3:\$[0-9]+]], 20($sp)
145 ; O32-DAG: sb [[R3]], 3([[R1]])
146 ; NEW-DAG: sb $7, 3([[R1]])
147 ; O32-DAG: lw [[R3:\$[0-9]+]], 24($sp)
148 ; O32-DAG: sb [[R3]], 4([[R1]])
149 ; NEW-DAG: sb $8, 4([[R1]])
150 ; O32-DAG: lw [[R3:\$[0-9]+]], 28($sp)
151 ; O32-DAG: sb [[R3]], 5([[R1]])
152 ; NEW-DAG: sb $9, 5([[R1]])
154 ; O32-DAG: lw [[R3:\$[0-9]+]], 32($sp)
155 ; O32-DAG: sb [[R3]], 6([[R1]])
156 ; NEW-DAG: sb $10, 6([[R1]])
158 ; O32-DAG: lw [[R3:\$[0-9]+]], 40($sp)
159 ; O32-DAG: sw [[R3]], 16([[R2]])
160 ; O32-DAG: lw [[R3:\$[0-9]+]], 44($sp)
161 ; O32-DAG: sw [[R3]], 20([[R2]])
162 ; NEW-DAG: sd $11, 16([[R2]])
164 ; O32/N32/N64 are accessing the stack at this point.
165 ; Unlike O32, N32/N64 do not reserve space for the arguments.
166 ; increase by 4 for O32 and 8 for N32/N64.
167 ; O32-DAG: lw [[R3:\$[0-9]+]], 48($sp)
168 ; O32-DAG: sb [[R3]], 7([[R1]])
169 ; NEW-DAG: lw [[R3:\$[0-9]+]], 0($sp)
170 ; NEW-DAG: sb [[R3]], 7([[R1]])