1 ; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=O32
2 ; RUN: llc -march=mips -regalloc=basic < %s | FileCheck %s -check-prefix=O32
3 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 < %s | FileCheck %s -check-prefix=N64
5 @i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
6 @i3 = common global i32* null, align 4
8 ; O32-DAG: lw $[[R0:[0-9]+]], %got(i3)
9 ; O32-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
10 ; O32: movn $[[R0]], $[[R1]], ${{[0-9]+}}
11 ; N64-DAG: ldr $[[R0:[0-9]+]]
12 ; N64-DAG: ld $[[R1:[0-9]+]], %got_disp(i1)
13 ; N64: movn $[[R0]], $[[R1]], ${{[0-9]+}}
14 define i32* @cmov1(i32 %s) nounwind readonly {
16 %tobool = icmp ne i32 %s, 0
17 %tmp1 = load i32** @i3, align 4
18 %cond = select i1 %tobool, i32* getelementptr inbounds ([3 x i32]* @i1, i32 0, i32 0), i32* %tmp1
22 @c = global i32 1, align 4
23 @d = global i32 0, align 4
26 ; O32: addiu $[[R1:[0-9]+]], ${{[a-z0-9]+}}, %got(d)
27 ; O32: addiu $[[R0:[0-9]+]], ${{[a-z0-9]+}}, %got(c)
28 ; O32: movn $[[R1]], $[[R0]], ${{[0-9]+}}
30 ; N64: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(d)
31 ; N64: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got_disp(c)
32 ; N64: movn $[[R1]], $[[R0]], ${{[0-9]+}}
33 define i32 @cmov2(i32 %s) nounwind readonly {
35 %tobool = icmp ne i32 %s, 0
36 %tmp1 = load i32* @c, align 4
37 %tmp2 = load i32* @d, align 4
38 %cond = select i1 %tobool, i32 %tmp1, i32 %tmp2
43 ; O32: xori $[[R0:[0-9]+]], ${{[0-9]+}}, 234
44 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
45 define i32 @cmov3(i32 %a, i32 %b, i32 %c) nounwind readnone {
47 %cmp = icmp eq i32 %a, 234
48 %cond = select i1 %cmp, i32 %b, i32 %c
53 ; N64: xori $[[R0:[0-9]+]], ${{[0-9]+}}, 234
54 ; N64: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
55 define i64 @cmov4(i32 %a, i64 %b, i64 %c) nounwind readnone {
57 %cmp = icmp eq i32 %a, 234
58 %cond = select i1 %cmp, i64 %b, i64 %c
62 ; slti and conditional move.
65 ; (select (setgt a, N), t, f)
67 ; (movz t, (setlt a, N + 1), f)
68 ; if N + 1 fits in 16-bit.
71 ; O32: slti $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
72 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
74 define i32 @slti0(i32 %a) {
76 %cmp = icmp sgt i32 %a, 32766
77 %cond = select i1 %cmp, i32 3, i32 4
82 ; O32: slt ${{[0-9]+}}
84 define i32 @slti1(i32 %a) {
86 %cmp = icmp sgt i32 %a, 32767
87 %cond = select i1 %cmp, i32 3, i32 4
92 ; O32: slti $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
93 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
95 define i32 @slti2(i32 %a) {
97 %cmp = icmp sgt i32 %a, -32769
98 %cond = select i1 %cmp, i32 3, i32 4
103 ; O32: slt ${{[0-9]+}}
105 define i32 @slti3(i32 %a) {
107 %cmp = icmp sgt i32 %a, -32770
108 %cond = select i1 %cmp, i32 3, i32 4
114 ; N64-LABEL: slti64_0:
115 ; N64: slti $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
116 ; N64: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
118 define i64 @slti64_0(i64 %a) {
120 %cmp = icmp sgt i64 %a, 32766
121 %conv = select i1 %cmp, i64 3, i64 4
125 ; N64-LABEL: slti64_1:
126 ; N64: slt ${{[0-9]+}}
128 define i64 @slti64_1(i64 %a) {
130 %cmp = icmp sgt i64 %a, 32767
131 %conv = select i1 %cmp, i64 3, i64 4
135 ; N64-LABEL: slti64_2:
136 ; N64: slti $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
137 ; N64: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
139 define i64 @slti64_2(i64 %a) {
141 %cmp = icmp sgt i64 %a, -32769
142 %conv = select i1 %cmp, i64 3, i64 4
146 ; N64-LABEL: slti64_3:
147 ; N64: slt ${{[0-9]+}}
149 define i64 @slti64_3(i64 %a) {
151 %cmp = icmp sgt i64 %a, -32770
152 %conv = select i1 %cmp, i64 3, i64 4
156 ; sltiu instructions.
159 ; O32: sltiu $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
160 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
162 define i32 @sltiu0(i32 %a) {
164 %cmp = icmp ugt i32 %a, 32766
165 %cond = select i1 %cmp, i32 3, i32 4
170 ; O32: sltu ${{[0-9]+}}
172 define i32 @sltiu1(i32 %a) {
174 %cmp = icmp ugt i32 %a, 32767
175 %cond = select i1 %cmp, i32 3, i32 4
180 ; O32: sltiu $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
181 ; O32: movz ${{[0-9]+}}, ${{[0-9]+}}, $[[R0]]
183 define i32 @sltiu2(i32 %a) {
185 %cmp = icmp ugt i32 %a, -32769
186 %cond = select i1 %cmp, i32 3, i32 4
191 ; O32: sltu ${{[0-9]+}}
193 define i32 @sltiu3(i32 %a) {
195 %cmp = icmp ugt i32 %a, -32770
196 %cond = select i1 %cmp, i32 3, i32 4