1 ; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=CHECK
2 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=CHECK
3 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=CHECK64
6 ; CHECK: sll $[[R0:[0-9]+]], $4, 2
7 ; CHECK: addu ${{[0-9]+}}, $[[R0]], $4
9 define i32 @mul5_32(i32 %a) {
11 %mul = mul nsw i32 %a, 5
16 ; CHECK-DAG: sll $[[R0:[0-9]+]], $4, 2
17 ; CHECK-DAG: addu $[[R1:[0-9]+]], $[[R0]], $4
18 ; CHECK-DAG: sll $[[R2:[0-9]+]], $4, 5
19 ; CHECK: subu ${{[0-9]+}}, $[[R2]], $[[R1]]
21 define i32 @mul27_32(i32 %a) {
23 %mul = mul nsw i32 %a, 27
27 ; CHECK: muln2147483643_32:
28 ; CHECK-DAG: sll $[[R0:[0-9]+]], $4, 2
29 ; CHECK-DAG: addu $[[R1:[0-9]+]], $[[R0]], $4
30 ; CHECK-DAG: sll $[[R2:[0-9]+]], $4, 31
31 ; CHECK: addu ${{[0-9]+}}, $[[R2]], $[[R1]]
33 define i32 @muln2147483643_32(i32 %a) {
35 %mul = mul nsw i32 %a, -2147483643
39 ; CHECK64: muln9223372036854775805_64:
40 ; CHECK64-DAG: sll $[[R0:[0-9]+]], $4, 1
41 ; CHECK64-DAG: addu $[[R1:[0-9]+]], $[[R0]], $4
42 ; CHECK64-DAG: sll $[[R2:[0-9]+]], $4, 63
43 ; CHECK64: addu ${{[0-9]+}}, $[[R2]], $[[R1]]
45 define i64 @muln9223372036854775805_64(i64 %a) {
47 %mul = mul nsw i64 %a, -9223372036854775805