1 ; Positive test for inline register constraints
3 ; RUN: llc -march=mipsel < %s | FileCheck -check-prefix=CHECK_LITTLE_32 %s
4 ; RUN: llc -march=mips < %s | FileCheck -check-prefix=CHECK_BIG_32 %s
6 %union.u_tag = type { i64 }
7 %struct.anon = type { i32, i32 }
8 @uval = common global %union.u_tag zeroinitializer, align 8
11 define i32 @constraint_X() nounwind {
13 ;CHECK_LITTLE_32-LABEL: constraint_X:
14 ;CHECK_LITTLE_32: #APP
15 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
16 ;CHECK_LITTLE_32: #NO_APP
17 tail call i32 asm sideeffect "addiu $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) ;
22 define i32 @constraint_x() nounwind {
24 ;CHECK_LITTLE_32-LABEL: constraint_x:
25 ;CHECK_LITTLE_32: #APP
26 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},0xfffd
27 ;CHECK_LITTLE_32: #NO_APP
28 tail call i32 asm sideeffect "addiu $0,$1,${2:x}", "=r,r,I"(i32 7, i32 -3) ;
33 define i32 @constraint_d() nounwind {
35 ;CHECK_LITTLE_32-LABEL: constraint_d:
36 ;CHECK_LITTLE_32: #APP
37 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},-3
38 ;CHECK_LITTLE_32: #NO_APP
39 tail call i32 asm sideeffect "addiu $0,$1,${2:d}", "=r,r,I"(i32 7, i32 -3) ;
44 define i32 @constraint_m() nounwind {
46 ;CHECK_LITTLE_32-LABEL: constraint_m:
47 ;CHECK_LITTLE_32: #APP
48 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},-4
49 ;CHECK_LITTLE_32: #NO_APP
50 tail call i32 asm sideeffect "addiu $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) ;
55 define i32 @constraint_z() nounwind {
57 ;CHECK_LITTLE_32-LABEL: constraint_z:
58 ;CHECK_LITTLE_32: #APP
59 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},-3
60 ;CHECK_LITTLE_32: #NO_APP
61 tail call i32 asm sideeffect "addiu $0,$1,${2:z}", "=r,r,I"(i32 7, i32 -3) ;
64 ;CHECK_LITTLE_32: #APP
65 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},$0
66 ;CHECK_LITTLE_32: #NO_APP
67 tail call i32 asm sideeffect "addiu $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
69 ; z with non-zero and the "r"(register) and "J"(integer zero) constraints
70 ;CHECK_LITTLE_32: #APP
71 ;CHECK_LITTLE_32: mtc0 ${{[1-9][0-9]?}}, ${{[0-9]+}}
72 ;CHECK_LITTLE_32: #NO_APP
73 call void asm sideeffect "mtc0 ${0:z}, $$12", "Jr"(i32 7) nounwind
75 ; z with zero and the "r"(register) and "J"(integer zero) constraints
76 ;CHECK_LITTLE_32: #APP
77 ;CHECK_LITTLE_32: mtc0 $0, ${{[0-9]+}}
78 ;CHECK_LITTLE_32: #NO_APP
79 call void asm sideeffect "mtc0 ${0:z}, $$12", "Jr"(i32 0) nounwind
81 ; z with non-zero and just the "r"(register) constraint
82 ;CHECK_LITTLE_32: #APP
83 ;CHECK_LITTLE_32: mtc0 ${{[1-9][0-9]?}}, ${{[0-9]+}}
84 ;CHECK_LITTLE_32: #NO_APP
85 call void asm sideeffect "mtc0 ${0:z}, $$12", "r"(i32 7) nounwind
87 ; z with zero and just the "r"(register) constraint
88 ; FIXME: Check for $0, instead of other registers.
89 ; We should be using $0 directly in this case, not real registers.
90 ; When the materialization of 0 gets fixed, this test will fail.
91 ;CHECK_LITTLE_32: #APP
92 ;CHECK_LITTLE_32: mtc0 ${{[1-9][0-9]?}}, ${{[0-9]+}}
93 ;CHECK_LITTLE_32: #NO_APP
94 call void asm sideeffect "mtc0 ${0:z}, $$12", "r"(i32 0) nounwind
98 ; a long long in 32 bit mode (use to assert)
99 define i32 @constraint_longlong() nounwind {
101 ;CHECK_LITTLE_32-LABEL: constraint_longlong:
102 ;CHECK_LITTLE_32: #APP
103 ;CHECK_LITTLE_32: addiu ${{[0-9]+}},${{[0-9]+}},3
104 ;CHECK_LITTLE_32: #NO_APP
105 tail call i64 asm sideeffect "addiu $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind
109 ; D, in little endian the source reg will be 4 bytes into the long long
110 define i32 @constraint_D() nounwind {
112 ;CHECK_LITTLE_32-LABEL: constraint_D:
113 ;CHECK_LITTLE_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
114 ;CHECK_LITTLE_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
115 ;CHECK_LITTLE_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
116 ;CHECK_LITTLE_32: #APP
117 ;CHECK_LITTLE_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
118 ;CHECK_LITTLE_32: #NO_APP
120 ; D, in big endian the source reg will also be 4 bytes into the long long
121 ;CHECK_BIG_32-LABEL: constraint_D:
122 ;CHECK_BIG_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
123 ;CHECK_BIG_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
124 ;CHECK_BIG_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
126 ;CHECK_BIG_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
127 ;CHECK_BIG_32: #NO_APP
128 %bosco = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
129 %trunc1 = trunc i64 %bosco to i32
130 tail call i32 asm sideeffect "or $0,${1:D},$2", "=r,r,r"(i64 %bosco, i32 %trunc1) nounwind
134 ; L, in little endian the source reg will be 0 bytes into the long long
135 define i32 @constraint_L() nounwind {
137 ;CHECK_LITTLE_32-LABEL: constraint_L:
138 ;CHECK_LITTLE_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
139 ;CHECK_LITTLE_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
140 ;CHECK_LITTLE_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
141 ;CHECK_LITTLE_32: #APP
142 ;CHECK_LITTLE_32: or ${{[0-9]+}},$[[FIRST]],${{[0-9]+}}
143 ;CHECK_LITTLE_32: #NO_APP
144 ; L, in big endian the source reg will be 4 bytes into the long long
145 ;CHECK_BIG_32-LABEL: constraint_L:
146 ;CHECK_BIG_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
147 ;CHECK_BIG_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
148 ;CHECK_BIG_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
150 ;CHECK_BIG_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
151 ;CHECK_BIG_32: #NO_APP
152 %bosco = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
153 %trunc1 = trunc i64 %bosco to i32
154 tail call i32 asm sideeffect "or $0,${1:L},$2", "=r,r,r"(i64 %bosco, i32 %trunc1) nounwind
158 ; M, in little endian the source reg will be 4 bytes into the long long
159 define i32 @constraint_M() nounwind {
161 ;CHECK_LITTLE_32-LABEL: constraint_M:
162 ;CHECK_LITTLE_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
163 ;CHECK_LITTLE_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
164 ;CHECK_LITTLE_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
165 ;CHECK_LITTLE_32: #APP
166 ;CHECK_LITTLE_32: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
167 ;CHECK_LITTLE_32: #NO_APP
168 ; M, in big endian the source reg will be 0 bytes into the long long
169 ;CHECK_BIG_32-LABEL: constraint_M:
170 ;CHECK_BIG_32: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
171 ;CHECK_BIG_32: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
172 ;CHECK_BIG_32: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
174 ;CHECK_BIG_32: or ${{[0-9]+}},$[[FIRST]],${{[0-9]+}}
175 ;CHECK_BIG_32: #NO_APP
176 %bosco = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
177 %trunc1 = trunc i64 %bosco to i32
178 tail call i32 asm sideeffect "or $0,${1:M},$2", "=r,r,r"(i64 %bosco, i32 %trunc1) nounwind