1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
2 ; RUN: -check-prefix=ALL -check-prefix=ALL-32BIT -check-prefix=M2
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
4 ; RUN: -check-prefix=ALL -check-prefix=ALL-32BIT -check-prefix=32R1-R2 -check-prefix=32R1
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
6 ; RUN: -check-prefix=ALL -check-prefix=ALL-32BIT -check-prefix=32R1-R2 -check-prefix=32R2
7 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
8 ; RUN: -check-prefix=ALL -check-prefix=ALL-32BIT -check-prefix=32R6
9 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
10 ; RUN: -check-prefix=ALL -check-prefix=ALL-64BIT -check-prefix=M4
11 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
12 ; RUN: -check-prefix=ALL -check-prefix=ALL-64BIT -check-prefix=64R1-R2
13 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
14 ; RUN: -check-prefix=ALL -check-prefix=ALL-64BIT -check-prefix=64R1-R2
15 ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
16 ; RUN: -check-prefix=ALL -check-prefix=ALL-64BIT -check-prefix=64R6
18 ; FIXME: We should be able to have signext on the return value without incurring
20 define i8 @add_i8(i8 signext %a, i8 signext %b) {
24 ; ALL: addu $2, $4, $5
30 ; FIXME: We should be able to have signext on the return value without incurring
32 define i16 @add_i16(i16 signext %a, i16 signext %b) {
36 ; ALL: addu $2, $4, $5
42 define signext i32 @add_i32(i32 signext %a, i32 signext %b) {
46 ; ALL: addu $2, $4, $5
52 define signext i64 @add_i64(i64 signext %a, i64 signext %b) {
56 ; ALL-32BIT-DAG: addu [[R1:\$3]], $5, $7
57 ; ALL-32BIT-DAG: sltu [[T0:\$[0-9]+]], [[R1]], $7
58 ; ALL-32BIT-DAG: addu [[T1:\$[0-9]+]], [[T0]], $6
59 ; ALL-32BIT-DAG: addu $2, $4, [[T1]]
61 ; ALL-64BIT: daddu $2, $4, $5
67 define signext i128 @add_i128(i128 signext %a, i128 signext %b) {
69 ; ALL-LABEL: add_i128:
71 ; ALL-32BIT-DAG: lw [[A3:\$[0-9]+]], 28($sp)
72 ; ALL-32BIT-DAG: addu [[T0:\$[0-9]+]], $7, [[A3]]
73 ; ALL-32BIT-DAG: sltu [[T1:\$[0-9]+]], [[T0]], [[A3]]
74 ; ALL-32BIT-DAG: lw [[A2:\$[0-9]+]], 24($sp)
75 ; ALL-32BIT-DAG: addu [[T2:\$[0-9]+]], [[T1]], [[A2]]
76 ; ALL-32BIT-DAG: addu [[T3:\$[0-9]+]], $6, [[T2]]
77 ; ALL-32BIT-DAG: sltu [[T4:\$[0-9]+]], [[T3]], [[A2]]
78 ; ALL-32BIT-DAG: lw [[A1:\$[0-9]+]], 20($sp)
79 ; ALL-32BIT-DAG: addu [[T5:\$[0-9]+]], [[T4]], [[A1]]
80 ; ALL-32BIT-DAG: lw [[A0:\$[0-9]+]], 16($sp)
81 ; ALL-32BIT-DAG: addu [[R1:\$3]], [[R3:\$5]], [[T5]]
82 ; ALL-32BIT-DAG: sltu [[T6:\$[0-9]+]], [[R1]], [[A1]]
83 ; ALL-32BIT-DAG: addu [[T7:\$[0-9]+]], [[T6]], [[A0]]
84 ; ALL-32BIT-DAG: addu $2, [[R2:\$4]], [[T7]]
85 ; ALL-32BIT-DAG: move [[R2]], [[T3]]
86 ; ALL-32BIT-DAG: move [[R3]], [[T0]]
88 ; ALL-64BIT-DAG: daddu [[R0:\$3]], $5, $7
89 ; ALL-64BIT-DAG: sltu [[T1:\$[0-9]+]], [[R0]], $7
90 ; ALL-64BIT-DAG: daddu [[T2:\$[0-9]+]], [[T1]], $6
91 ; ALL-64BIT-DAG: daddu $2, $4, [[T2]]