1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
2 ; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
4 ; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=GP32 \
6 ; RUN: -check-prefix=R2 -check-prefix=R2-R6 -check-prefix=NOT-R6
7 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
8 ; RUN: -check-prefix=GP32 -check-prefix=R6 -check-prefix=R2-R6
9 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
10 ; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
11 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
12 ; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
13 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
14 ; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
15 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
16 ; RUN: -check-prefix=R2 -check-prefix=R2-R6 \
17 ; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
18 ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
19 ; RUN: -check-prefix=64R6 -check-prefix=R6 -check-prefix=R2-R6
21 define signext i1 @srem_i1(i1 signext %a, i1 signext %b) {
25 ; NOT-R6: div $zero, $4, $5
26 ; NOT-R6: teq $5, $zero, 7
27 ; NOT-R6: mfhi $[[T0:[0-9]+]]
28 ; NOT-R6: sll $[[T1:[0-9]+]], $[[T0]], 31
29 ; NOT-R6: sra $2, $[[T1]], 31
31 ; R6: mod $[[T0:[0-9]+]], $4, $5
32 ; R6: teq $5, $zero, 7
33 ; R6: sll $[[T3:[0-9]+]], $[[T0]], 31
34 ; R6: sra $2, $[[T3]], 31
40 define signext i8 @srem_i8(i8 signext %a, i8 signext %b) {
44 ; NOT-R2-R6: div $zero, $4, $5
45 ; NOT-R2-R6: teq $5, $zero, 7
46 ; NOT-R2-R6: mfhi $[[T0:[0-9]+]]
47 ; NOT-R2-R6: sll $[[T1:[0-9]+]], $[[T0]], 24
48 ; NOT-R2-R6: sra $2, $[[T1]], 24
50 ; R2: div $zero, $4, $5
51 ; R2: teq $5, $zero, 7
52 ; R2: mfhi $[[T0:[0-9]+]]
55 ; R6: mod $[[T0:[0-9]+]], $4, $5
56 ; R6: teq $5, $zero, 7
63 define signext i16 @srem_i16(i16 signext %a, i16 signext %b) {
65 ; ALL-LABEL: srem_i16:
67 ; NOT-R2-R6: div $zero, $4, $5
68 ; NOT-R2-R6: teq $5, $zero, 7
69 ; NOT-R2-R6: mfhi $[[T0:[0-9]+]]
70 ; NOT-R2-R6: sll $[[T1:[0-9]+]], $[[T0]], 16
71 ; NOT-R2-R6: sra $2, $[[T1]], 16
73 ; R2: div $zero, $4, $5
74 ; R2: teq $5, $zero, 7
75 ; R2: mfhi $[[T0:[0-9]+]]
78 ; R6: mod $[[T0:[0-9]+]], $4, $5
79 ; R6: teq $5, $zero, 7
86 define signext i32 @srem_i32(i32 signext %a, i32 signext %b) {
88 ; ALL-LABEL: srem_i32:
90 ; NOT-R6: div $zero, $4, $5
91 ; NOT-R6: teq $5, $zero, 7
95 ; R6: teq $5, $zero, 7
101 define signext i64 @srem_i64(i64 signext %a, i64 signext %b) {
103 ; ALL-LABEL: srem_i64:
105 ; GP32: lw $25, %call16(__moddi3)($gp)
107 ; GP64-NOT-R6: ddiv $zero, $4, $5
108 ; GP64-NOT-R6: teq $5, $zero, 7
109 ; GP64-NOT-R6: mfhi $2
111 ; 64R6: dmod $2, $4, $5
112 ; 64R6: teq $5, $zero, 7