1 ; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n64 | FileCheck %s -check-prefix=CHECK-N64
2 ; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=-n64,n32 | FileCheck %s -check-prefix=CHECK-N32
4 @c = common global i8 0, align 4
5 @s = common global i16 0, align 4
6 @i = common global i32 0, align 4
7 @l = common global i64 0, align 8
8 @uc = common global i8 0, align 4
9 @us = common global i16 0, align 4
10 @ui = common global i32 0, align 4
11 @l1 = common global i64 0, align 8
13 define i64 @func1() nounwind readonly {
16 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c)
17 ; CHECK-N64: lb ${{[0-9]+}}, 0($[[R0]])
19 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c)
20 ; CHECK-N32: lb ${{[0-9]+}}, 0($[[R0]])
21 %0 = load i8* @c, align 4
22 %conv = sext i8 %0 to i64
26 define i64 @func2() nounwind readonly {
29 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s)
30 ; CHECK-N64: lh ${{[0-9]+}}, 0($[[R0]])
32 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s)
33 ; CHECK-N32: lh ${{[0-9]+}}, 0($[[R0]])
34 %0 = load i16* @s, align 4
35 %conv = sext i16 %0 to i64
39 define i64 @func3() nounwind readonly {
42 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i)
43 ; CHECK-N64: lw ${{[0-9]+}}, 0($[[R0]])
45 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i)
46 ; CHECK-N32: lw ${{[0-9]+}}, 0($[[R0]])
47 %0 = load i32* @i, align 4
48 %conv = sext i32 %0 to i64
52 define i64 @func4() nounwind readonly {
55 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l)
56 ; CHECK-N64: ld ${{[0-9]+}}, 0($[[R0]])
58 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l)
59 ; CHECK-N32: ld ${{[0-9]+}}, 0($[[R0]])
60 %0 = load i64* @l, align 8
64 define i64 @ufunc1() nounwind readonly {
67 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(uc)
68 ; CHECK-N64: lbu ${{[0-9]+}}, 0($[[R0]])
70 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(uc)
71 ; CHECK-N32: lbu ${{[0-9]+}}, 0($[[R0]])
72 %0 = load i8* @uc, align 4
73 %conv = zext i8 %0 to i64
77 define i64 @ufunc2() nounwind readonly {
80 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(us)
81 ; CHECK-N64: lhu ${{[0-9]+}}, 0($[[R0]])
83 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(us)
84 ; CHECK-N32: lhu ${{[0-9]+}}, 0($[[R0]])
85 %0 = load i16* @us, align 4
86 %conv = zext i16 %0 to i64
90 define i64 @ufunc3() nounwind readonly {
93 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(ui)
94 ; CHECK-N64: lwu ${{[0-9]+}}, 0($[[R0]])
96 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(ui)
97 ; CHECK-N32: lwu ${{[0-9]+}}, 0($[[R0]])
98 %0 = load i32* @ui, align 4
99 %conv = zext i32 %0 to i64
103 define void @sfunc1() nounwind {
106 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c)
107 ; CHECK-N64: sb ${{[0-9]+}}, 0($[[R0]])
109 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c)
110 ; CHECK-N32: sb ${{[0-9]+}}, 0($[[R0]])
111 %0 = load i64* @l1, align 8
112 %conv = trunc i64 %0 to i8
113 store i8 %conv, i8* @c, align 4
117 define void @sfunc2() nounwind {
120 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s)
121 ; CHECK-N64: sh ${{[0-9]+}}, 0($[[R0]])
123 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s)
124 ; CHECK-N32: sh ${{[0-9]+}}, 0($[[R0]])
125 %0 = load i64* @l1, align 8
126 %conv = trunc i64 %0 to i16
127 store i16 %conv, i16* @s, align 4
131 define void @sfunc3() nounwind {
134 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i)
135 ; CHECK-N64: sw ${{[0-9]+}}, 0($[[R0]])
137 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i)
138 ; CHECK-N32: sw ${{[0-9]+}}, 0($[[R0]])
139 %0 = load i64* @l1, align 8
140 %conv = trunc i64 %0 to i32
141 store i32 %conv, i32* @i, align 4
145 define void @sfunc4() nounwind {
148 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l)
149 ; CHECK-N64: sd ${{[0-9]+}}, 0($[[R0]])
151 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l)
152 ; CHECK-N32: sd ${{[0-9]+}}, 0($[[R0]])
153 %0 = load i64* @l1, align 8
154 store i64 %0, i64* @l, align 8