1 ; RUN: llc -march=mips -mattr=+msa < %s | FileCheck -check-prefix=MIPS32 %s
3 @v16i8 = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>
4 @v8i16 = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>
5 @v4i32 = global <4 x i32> <i32 0, i32 0, i32 0, i32 0>
6 @v2i64 = global <2 x i64> <i64 0, i64 0>
9 define void @const_v16i8() nounwind {
10 ; MIPS32: const_v16i8:
12 store volatile <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8>*@v16i8
13 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 0
15 store volatile <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <16 x i8>*@v16i8
16 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 1
18 store volatile <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 31>, <16 x i8>*@v16i8
19 ; MIPS32: ld.b [[R1:\$w[0-9]+]], %lo(
21 store volatile <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6>, <16 x i8>*@v16i8
22 ; MIPS32: ld.b [[R1:\$w[0-9]+]], %lo(
24 store volatile <16 x i8> <i8 1, i8 2, i8 1, i8 2, i8 1, i8 2, i8 1, i8 2, i8 1, i8 2, i8 1, i8 2, i8 1, i8 2, i8 1, i8 2>, <16 x i8>*@v16i8
25 ; MIPS32: ldi.h [[R1:\$w[0-9]+]], 258
27 store volatile <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4>, <16 x i8>*@v16i8
28 ; MIPS32-DAG: lui [[R2:\$[0-9]+]], 258
29 ; MIPS32-DAG: ori [[R2]], [[R2]], 772
30 ; MIPS32-DAG: fill.w [[R1:\$w[0-9]+]], [[R2]]
32 store volatile <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, <16 x i8>*@v16i8
33 ; MIPS32: ld.b [[R1:\$w[0-9]+]], %lo(
36 ; MIPS32: .size const_v16i8
39 define void @const_v8i16() nounwind {
40 ; MIPS32: const_v8i16:
42 store volatile <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, <8 x i16>*@v8i16
43 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 0
45 store volatile <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, <8 x i16>*@v8i16
46 ; MIPS32: ldi.h [[R1:\$w[0-9]+]], 1
48 store volatile <8 x i16> <i16 1, i16 1, i16 1, i16 2, i16 1, i16 1, i16 1, i16 31>, <8 x i16>*@v8i16
49 ; MIPS32: ld.h [[R1:\$w[0-9]+]], %lo(
51 store volatile <8 x i16> <i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028>, <8 x i16>*@v8i16
52 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 4
54 store volatile <8 x i16> <i16 1, i16 2, i16 1, i16 2, i16 1, i16 2, i16 1, i16 2>, <8 x i16>*@v8i16
55 ; MIPS32-DAG: lui [[R2:\$[0-9]+]], 1
56 ; MIPS32-DAG: ori [[R2]], [[R2]], 2
57 ; MIPS32-DAG: fill.w [[R1:\$w[0-9]+]], [[R2]]
59 store volatile <8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 1, i16 2, i16 3, i16 4>, <8 x i16>*@v8i16
60 ; MIPS32: ld.h [[R1:\$w[0-9]+]], %lo(
63 ; MIPS32: .size const_v8i16
66 define void @const_v4i32() nounwind {
67 ; MIPS32: const_v4i32:
69 store volatile <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32>*@v4i32
70 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 0
72 store volatile <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>*@v4i32
73 ; MIPS32: ldi.w [[R1:\$w[0-9]+]], 1
75 store volatile <4 x i32> <i32 1, i32 1, i32 1, i32 31>, <4 x i32>*@v4i32
76 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
78 store volatile <4 x i32> <i32 16843009, i32 16843009, i32 16843009, i32 16843009>, <4 x i32>*@v4i32
79 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 1
81 store volatile <4 x i32> <i32 65537, i32 65537, i32 65537, i32 65537>, <4 x i32>*@v4i32
82 ; MIPS32: ldi.h [[R1:\$w[0-9]+]], 1
84 store volatile <4 x i32> <i32 1, i32 2, i32 1, i32 2>, <4 x i32>*@v4i32
85 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
87 store volatile <4 x i32> <i32 3, i32 4, i32 5, i32 6>, <4 x i32>*@v4i32
88 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
91 ; MIPS32: .size const_v4i32
94 define void @const_v2i64() nounwind {
95 ; MIPS32: const_v2i64:
97 store volatile <2 x i64> <i64 0, i64 0>, <2 x i64>*@v2i64
98 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 0
100 store volatile <2 x i64> <i64 72340172838076673, i64 72340172838076673>, <2 x i64>*@v2i64
101 ; MIPS32: ldi.b [[R1:\$w[0-9]+]], 1
103 store volatile <2 x i64> <i64 281479271743489, i64 281479271743489>, <2 x i64>*@v2i64
104 ; MIPS32: ldi.h [[R1:\$w[0-9]+]], 1
106 store volatile <2 x i64> <i64 4294967297, i64 4294967297>, <2 x i64>*@v2i64
107 ; MIPS32: ldi.w [[R1:\$w[0-9]+]], 1
109 store volatile <2 x i64> <i64 1, i64 1>, <2 x i64>*@v2i64
110 ; MIPS32: ldi.d [[R1:\$w[0-9]+]], 1
112 store volatile <2 x i64> <i64 1, i64 31>, <2 x i64>*@v2i64
113 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
115 store volatile <2 x i64> <i64 3, i64 4>, <2 x i64>*@v2i64
116 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
119 ; MIPS32: .size const_v2i64