1 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck -check-prefix=MIPS32 %s
3 @v4f32 = global <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>
4 @v2f64 = global <2 x double> <double 0.0, double 0.0>
6 define void @const_v4f32() nounwind {
9 store volatile <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <4 x float>*@v4f32
10 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
12 store volatile <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, <4 x float>*@v4f32
13 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
15 store volatile <4 x float> <float 1.0, float 1.0, float 1.0, float 31.0>, <4 x float>*@v4f32
16 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
18 store volatile <4 x float> <float 65537.0, float 65537.0, float 65537.0, float 65537.0>, <4 x float>*@v4f32
19 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
21 store volatile <4 x float> <float 1.0, float 2.0, float 1.0, float 2.0>, <4 x float>*@v4f32
22 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
24 store volatile <4 x float> <float 3.0, float 4.0, float 5.0, float 6.0>, <4 x float>*@v4f32
25 ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
28 ; MIPS32: .size const_v4f32
31 define void @const_v2f64() nounwind {
32 ; MIPS32: const_v2f64:
34 store volatile <2 x double> <double 0.0, double 0.0>, <2 x double>*@v2f64
35 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
37 store volatile <2 x double> <double 72340172838076673.0, double 72340172838076673.0>, <2 x double>*@v2f64
38 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
40 store volatile <2 x double> <double 281479271743489.0, double 281479271743489.0>, <2 x double>*@v2f64
41 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
43 store volatile <2 x double> <double 4294967297.0, double 4294967297.0>, <2 x double>*@v2f64
44 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
46 store volatile <2 x double> <double 1.0, double 1.0>, <2 x double>*@v2f64
47 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
49 store volatile <2 x double> <double 1.0, double 31.0>, <2 x double>*@v2f64
50 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
52 store volatile <2 x double> <double 3.0, double 4.0>, <2 x double>*@v2f64
53 ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
56 ; MIPS32: .size const_v2f64
59 define float @extract_v4f32() nounwind {
60 ; MIPS32: extract_v4f32:
62 %1 = load <4 x float>* @v4f32
63 ; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]],
65 %2 = fadd <4 x float> %1, %1
66 ; MIPS32-DAG: fadd.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
68 %3 = extractelement <4 x float> %2, i32 1
69 ; Element 1 can be obtained by splatting it across the vector and extracting
71 ; MIPS32-DAG: splati.w $w0, [[R1]][1]
74 ; MIPS32: .size extract_v4f32
77 define float @extract_v4f32_elt0() nounwind {
78 ; MIPS32: extract_v4f32_elt0:
80 %1 = load <4 x float>* @v4f32
81 ; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]],
83 %2 = fadd <4 x float> %1, %1
84 ; MIPS32-DAG: fadd.w $w0, [[R1]], [[R1]]
86 %3 = extractelement <4 x float> %2, i32 0
87 ; Element 0 can be obtained by extracting $w0:sub_lo ($f0)
88 ; MIPS32-NOT: copy_u.w
92 ; MIPS32: .size extract_v4f32_elt0
95 define double @extract_v2f64() nounwind {
96 ; MIPS32: extract_v2f64:
98 %1 = load <2 x double>* @v2f64
99 ; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]],
101 %2 = fadd <2 x double> %1, %1
102 ; MIPS32-DAG: fadd.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
104 %3 = extractelement <2 x double> %2, i32 1
105 ; Element 1 can be obtained by splatting it across the vector and extracting
107 ; MIPS32-DAG: splati.d $w0, [[R1]][1]
108 ; MIPS32-NOT: copy_u.w
115 ; MIPS32: .size extract_v2f64
118 define double @extract_v2f64_elt0() nounwind {
119 ; MIPS32: extract_v2f64_elt0:
121 %1 = load <2 x double>* @v2f64
122 ; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]],
124 %2 = fadd <2 x double> %1, %1
125 ; MIPS32-DAG: fadd.d $w0, [[R1]], [[R1]]
127 %3 = extractelement <2 x double> %2, i32 0
128 ; Element 0 can be obtained by extracting $w0:sub_64 ($f0)
129 ; MIPS32-NOT: copy_u.w
136 ; MIPS32: .size extract_v2f64_elt0