1 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG -check-prefix=ODDSPREG-NO-EMIT
2 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOODDSPREG
3 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG -check-prefix=ODDSPREG-NO-EMIT
4 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOODDSPREG
5 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG -check-prefix=ODDSPREG-EMIT
7 ; We don't emit a directive unless we need to. This is to support versions of
8 ; GAS which do not support the directive.
9 ; ODDSPREG-EMIT: .module oddspreg
10 ; ODDSPREG-NO-EMIT-NOT: .module oddspreg
11 ; NOODDSPREG: .module nooddspreg
13 define float @two_floats(float %a) {
15 ; Clobber all except $f12 and $f13
17 ; The intention is that if odd single precision registers are permitted, the
18 ; allocator will choose $f12 and $f13 to avoid the spill/reload.
20 ; On the other hand, if odd single precision registers are not permitted, it
21 ; will be forced to spill/reload either %a or %0.
23 %0 = fadd float %a, 1.0
24 call void asm "# Clobber", "~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
25 %1 = fadd float %a, %0
29 ; ALL-LABEL: two_floats:
30 ; ODDSPREG: add.s $f13, $f12, ${{f[0-9]+}}
33 ; ODDSPREG: add.s $f0, $f12, $f13
35 ; NOODDSPREG: add.s $[[T0:f[0-9]*[02468]]], $f12, ${{f[0-9]+}}
36 ; NOODDSPREG: swc1 $[[T0]],
37 ; NOODDSPREG: lwc1 $[[T1:f[0-9]*[02468]]],
38 ; NOODDSPREG: add.s $f0, $f12, $[[T1]]
40 define double @two_doubles(double %a) {
42 ; Clobber all except $f12 and $f13
44 ; -mno-odd-sp-reg doesn't need to affect double precision values so both cases
47 %0 = fadd double %a, 1.0
48 call void asm "# Clobber", "~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
49 %1 = fadd double %a, %0
53 ; ALL-LABEL: two_doubles:
54 ; ALL: add.d $[[T0:f[0-9]+]], $f12, ${{f[0-9]+}}
55 ; ALL: add.d $f0, $f12, $[[T0]]
58 ; INVALID: -mattr=+nooddspreg is not currently permitted for a 32-bit FPU register file (FR=0 mode).