1 ; reenable when the correct value for TransientStackAlignment is set.
2 ; DISABLED: llc -march=mipsel -pre-RA-sched=source < %s | FileCheck %s
6 ; All test functions do the same thing - they return the first variable
9 ; All CHECK's do the same thing - they check whether variable arguments from
10 ; registers are placed on correct stack locations, and whether the first
11 ; variable argument is returned from the correct stack location.
14 declare void @llvm.va_start(i8*) nounwind
15 declare void @llvm.va_end(i8*) nounwind
18 define i32 @va1(i32 %a, ...) nounwind {
20 %a.addr = alloca i32, align 4
21 %ap = alloca i8*, align 4
22 %b = alloca i32, align 4
23 store i32 %a, i32* %a.addr, align 4
24 %ap1 = bitcast i8** %ap to i8*
25 call void @llvm.va_start(i8* %ap1)
26 %0 = va_arg i8** %ap, i32
27 store i32 %0, i32* %b, align 4
28 %ap2 = bitcast i8** %ap to i8*
29 call void @llvm.va_end(i8* %ap2)
30 %tmp = load i32* %b, align 4
34 ; CHECK: addiu $sp, $sp, -16
35 ; CHECK: sw $7, 28($sp)
36 ; CHECK: sw $6, 24($sp)
37 ; CHECK: sw $5, 20($sp)
38 ; CHECK: lw $2, 20($sp)
41 ; check whether the variable double argument will be accessed from the 8-byte
42 ; aligned location (i.e. whether the address is computed by adding 7 and
43 ; clearing lower 3 bits)
44 define double @va2(i32 %a, ...) nounwind {
46 %a.addr = alloca i32, align 4
47 %ap = alloca i8*, align 4
48 %b = alloca double, align 8
49 store i32 %a, i32* %a.addr, align 4
50 %ap1 = bitcast i8** %ap to i8*
51 call void @llvm.va_start(i8* %ap1)
52 %0 = va_arg i8** %ap, double
53 store double %0, double* %b, align 8
54 %ap2 = bitcast i8** %ap to i8*
55 call void @llvm.va_end(i8* %ap2)
56 %tmp = load double* %b, align 8
60 ; CHECK: addiu $sp, $sp, -16
61 ; CHECK: sw $7, 28($sp)
62 ; CHECK: sw $6, 24($sp)
63 ; CHECK: sw $5, 20($sp)
64 ; CHECK: addiu $[[R0:[0-9]+]], $sp, 20
65 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7
66 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8
67 ; CHECK: and $[[R3:[0-9]+]], $[[R1]], $[[R2]]
68 ; CHECK: ldc1 $f0, 0($[[R3]])
72 define i32 @va3(double %a, ...) nounwind {
74 %a.addr = alloca double, align 8
75 %ap = alloca i8*, align 4
76 %b = alloca i32, align 4
77 store double %a, double* %a.addr, align 8
78 %ap1 = bitcast i8** %ap to i8*
79 call void @llvm.va_start(i8* %ap1)
80 %0 = va_arg i8** %ap, i32
81 store i32 %0, i32* %b, align 4
82 %ap2 = bitcast i8** %ap to i8*
83 call void @llvm.va_end(i8* %ap2)
84 %tmp = load i32* %b, align 4
88 ; CHECK: addiu $sp, $sp, -16
89 ; CHECK: sw $7, 28($sp)
90 ; CHECK: sw $6, 24($sp)
91 ; CHECK: lw $2, 24($sp)
95 define double @va4(double %a, ...) nounwind {
97 %a.addr = alloca double, align 8
98 %ap = alloca i8*, align 4
99 %b = alloca double, align 8
100 store double %a, double* %a.addr, align 8
101 %ap1 = bitcast i8** %ap to i8*
102 call void @llvm.va_start(i8* %ap1)
103 %0 = va_arg i8** %ap, double
104 store double %0, double* %b, align 8
105 %ap2 = bitcast i8** %ap to i8*
106 call void @llvm.va_end(i8* %ap2)
107 %tmp = load double* %b, align 8
111 ; CHECK: addiu $sp, $sp, -24
112 ; CHECK: sw $7, 36($sp)
113 ; CHECK: sw $6, 32($sp)
114 ; CHECK: addiu ${{[0-9]+}}, $sp, 32
115 ; CHECK: ldc1 $f0, 32($sp)
119 define i32 @va5(i32 %a, i32 %b, i32 %c, ...) nounwind {
121 %a.addr = alloca i32, align 4
122 %b.addr = alloca i32, align 4
123 %c.addr = alloca i32, align 4
124 %ap = alloca i8*, align 4
125 %d = alloca i32, align 4
126 store i32 %a, i32* %a.addr, align 4
127 store i32 %b, i32* %b.addr, align 4
128 store i32 %c, i32* %c.addr, align 4
129 %ap1 = bitcast i8** %ap to i8*
130 call void @llvm.va_start(i8* %ap1)
131 %0 = va_arg i8** %ap, i32
132 store i32 %0, i32* %d, align 4
133 %ap2 = bitcast i8** %ap to i8*
134 call void @llvm.va_end(i8* %ap2)
135 %tmp = load i32* %d, align 4
139 ; CHECK: addiu $sp, $sp, -24
140 ; CHECK: sw $7, 36($sp)
141 ; CHECK: lw $2, 36($sp)
145 define double @va6(i32 %a, i32 %b, i32 %c, ...) nounwind {
147 %a.addr = alloca i32, align 4
148 %b.addr = alloca i32, align 4
149 %c.addr = alloca i32, align 4
150 %ap = alloca i8*, align 4
151 %d = alloca double, align 8
152 store i32 %a, i32* %a.addr, align 4
153 store i32 %b, i32* %b.addr, align 4
154 store i32 %c, i32* %c.addr, align 4
155 %ap1 = bitcast i8** %ap to i8*
156 call void @llvm.va_start(i8* %ap1)
157 %0 = va_arg i8** %ap, double
158 store double %0, double* %d, align 8
159 %ap2 = bitcast i8** %ap to i8*
160 call void @llvm.va_end(i8* %ap2)
161 %tmp = load double* %d, align 8
165 ; CHECK: addiu $sp, $sp, -24
166 ; CHECK: sw $7, 36($sp)
167 ; CHECK: addiu $[[R0:[0-9]+]], $sp, 36
168 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7
169 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8
170 ; CHECK: and $[[R3:[0-9]+]], $[[R1]], $[[R2]]
171 ; CHECK: ldc1 $f0, 0($[[R3]])
175 define i32 @va7(i32 %a, double %b, ...) nounwind {
177 %a.addr = alloca i32, align 4
178 %b.addr = alloca double, align 8
179 %ap = alloca i8*, align 4
180 %c = alloca i32, align 4
181 store i32 %a, i32* %a.addr, align 4
182 store double %b, double* %b.addr, align 8
183 %ap1 = bitcast i8** %ap to i8*
184 call void @llvm.va_start(i8* %ap1)
185 %0 = va_arg i8** %ap, i32
186 store i32 %0, i32* %c, align 4
187 %ap2 = bitcast i8** %ap to i8*
188 call void @llvm.va_end(i8* %ap2)
189 %tmp = load i32* %c, align 4
193 ; CHECK: addiu $sp, $sp, -24
194 ; CHECK: lw $2, 40($sp)
198 define double @va8(i32 %a, double %b, ...) nounwind {
200 %a.addr = alloca i32, align 4
201 %b.addr = alloca double, align 8
202 %ap = alloca i8*, align 4
203 %c = alloca double, align 8
204 store i32 %a, i32* %a.addr, align 4
205 store double %b, double* %b.addr, align 8
206 %ap1 = bitcast i8** %ap to i8*
207 call void @llvm.va_start(i8* %ap1)
208 %0 = va_arg i8** %ap, double
209 store double %0, double* %c, align 8
210 %ap2 = bitcast i8** %ap to i8*
211 call void @llvm.va_end(i8* %ap2)
212 %tmp = load double* %c, align 8
216 ; CHECK: addiu $sp, $sp, -32
217 ; CHECK: addiu ${{[0-9]+}}, $sp, 48
218 ; CHECK: ldc1 $f0, 48($sp)
222 define i32 @va9(double %a, double %b, i32 %c, ...) nounwind {
224 %a.addr = alloca double, align 8
225 %b.addr = alloca double, align 8
226 %c.addr = alloca i32, align 4
227 %ap = alloca i8*, align 4
228 %d = alloca i32, align 4
229 store double %a, double* %a.addr, align 8
230 store double %b, double* %b.addr, align 8
231 store i32 %c, i32* %c.addr, align 4
232 %ap1 = bitcast i8** %ap to i8*
233 call void @llvm.va_start(i8* %ap1)
234 %0 = va_arg i8** %ap, i32
235 store i32 %0, i32* %d, align 4
236 %ap2 = bitcast i8** %ap to i8*
237 call void @llvm.va_end(i8* %ap2)
238 %tmp = load i32* %d, align 4
242 ; CHECK: addiu $sp, $sp, -32
243 ; CHECK: lw $2, 52($sp)
247 define double @va10(double %a, double %b, i32 %c, ...) nounwind {
249 %a.addr = alloca double, align 8
250 %b.addr = alloca double, align 8
251 %c.addr = alloca i32, align 4
252 %ap = alloca i8*, align 4
253 %d = alloca double, align 8
254 store double %a, double* %a.addr, align 8
255 store double %b, double* %b.addr, align 8
256 store i32 %c, i32* %c.addr, align 4
257 %ap1 = bitcast i8** %ap to i8*
258 call void @llvm.va_start(i8* %ap1)
259 %0 = va_arg i8** %ap, double
260 store double %0, double* %d, align 8
261 %ap2 = bitcast i8** %ap to i8*
262 call void @llvm.va_end(i8* %ap2)
263 %tmp = load double* %d, align 8
267 ; CHECK: addiu $sp, $sp, -32
268 ; CHECK: addiu $[[R0:[0-9]+]], $sp, 52
269 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7
270 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8
271 ; CHECK: and $[[R3:[0-9]+]], $[[R1]], $[[R2]]
272 ; CHECK: ldc1 $f0, 0($[[R3]])