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[mips] Add instruction selection pattern for (seteq $LHS, 0).
[oota-llvm.git]
/
test
/
CodeGen
/
Mips
/
setcc-se.ll
1
; RUN: llc -march=mipsel < %s | FileCheck %s
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3
; CHECK: seteq0:
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; CHECK: sltiu ${{[0-9]+}}, $4, 1
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define i32 @seteq0(i32 %a) {
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entry:
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%cmp = icmp eq i32 %a, 0
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}