1 ; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s
2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s
7 define i16 @cvt_i16_i32(i32 %x) {
8 ; CHECK: cvt.u16.u32 %rs{{[0-9]+}}, %r{{[0-9]+}}
10 %a = trunc i32 %x to i16
14 define i16 @cvt_i16_i64(i64 %x) {
15 ; CHECK: cvt.u16.u64 %rs{{[0-9]+}}, %rl{{[0-9]+}}
17 %a = trunc i64 %x to i16
25 define i32 @cvt_i32_i16(i16 %x) {
26 ; CHECK: cvt.u32.u16 %r{{[0-9]+}}, %rs{{[0-9]+}}
28 %a = zext i16 %x to i32
32 define i32 @cvt_i32_i64(i64 %x) {
33 ; CHECK: cvt.u32.u64 %r{{[0-9]+}}, %rl{{[0-9]+}}
35 %a = trunc i64 %x to i32
43 define i64 @cvt_i64_i16(i16 %x) {
44 ; CHECK: cvt.u64.u16 %rl{{[0-9]+}}, %rs{{[0-9]+}}
46 %a = zext i16 %x to i64
50 define i64 @cvt_i64_i32(i32 %x) {
51 ; CHECK: cvt.u64.u32 %rl{{[0-9]+}}, %r{{[0-9]+}}
53 %a = zext i32 %x to i64