1 ; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC32
2 ; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC64
6 define i32 @test_cr2() nounwind {
8 %ret = alloca i32, align 4
9 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
10 store i32 %0, i32* %ret, align 4
12 %1 = load i32* %ret, align 4
17 ; PPC32-NEXT: stw 12, {{[0-9]+}}(31)
18 ; PPC32: lwz 12, {{[0-9]+}}(31)
19 ; PPC32-NEXT: mtcrf 32, 12
22 ; PPC64-NEXT: stw 12, 8(1)
24 ; PPC64-NEXT: mtcrf 32, 12
26 define i32 @test_cr234() nounwind {
28 %ret = alloca i32, align 4
29 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmp 2,$2,$1\0A\09cmp 3,$2,$2\0A\09cmp 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
30 store i32 %0, i32* %ret, align 4
32 %1 = load i32* %ret, align 4
37 ; PPC32-NEXT: stw 12, {{[0-9]+}}(31)
38 ; PPC32: lwz 12, {{[0-9]+}}(31)
39 ; PPC32-NEXT: mtcrf 32, 12
40 ; PPC32-NEXT: mtcrf 16, 12
41 ; PPC32-NEXT: mtcrf 8, 12
44 ; PPC64-NEXT: stw 12, 8(1)
46 ; PPC64-NEXT: mtcrf 32, 12
47 ; PPC64-NEXT: mtcrf 16, 12
48 ; PPC64-NEXT: mtcrf 8, 12