1 ; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32
2 ; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64
6 define i32 @test_cr2() nounwind uwtable {
8 %ret = alloca i32, align 4
9 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09mfcr $0", "=r,r,r,r,r,~{cr2}"(i32 1, i32 2, i32 3, i32 0) nounwind
10 store i32 %0, i32* %ret, align 4
12 %1 = load i32, i32* %ret, align 4
16 ; PPC32: stw 31, -4(1)
17 ; PPC32: stwu 1, -32(1)
19 ; PPC32-NEXT: stw 12, 24(31)
20 ; PPC32: lwz 12, 24(31)
21 ; PPC32-NEXT: mtocrf 32, 12
23 ; PPC64: .cfi_startproc
26 ; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
27 ; PPC64: .cfi_def_cfa_offset 128
28 ; PPC64: .cfi_offset lr, 16
29 ; PPC64: .cfi_offset cr2, 8
30 ; PPC64: addi 1, 1, [[AMT]]
32 ; PPC64: mtocrf 32, 12
35 define i32 @test_cr234() nounwind {
37 %ret = alloca i32, align 4
38 %0 = call i32 asm sideeffect "\0A\09mtcr $4\0A\09cmpw 2,$2,$1\0A\09cmpw 3,$2,$2\0A\09cmpw 4,$2,$3\0A\09mfcr $0", "=r,r,r,r,r,~{cr2},~{cr3},~{cr4}"(i32 1, i32 2, i32 3, i32 0) nounwind
39 store i32 %0, i32* %ret, align 4
41 %1 = load i32, i32* %ret, align 4
45 ; PPC32: stw 31, -4(1)
46 ; PPC32: stwu 1, -32(1)
48 ; PPC32-NEXT: stw 12, 24(31)
49 ; PPC32: lwz 12, 24(31)
50 ; PPC32-NEXT: mtocrf 32, 12
51 ; PPC32-NEXT: mtocrf 16, 12
52 ; PPC32-NEXT: mtocrf 8, 12
56 ; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
57 ; PPC64: addi 1, 1, [[AMT]]
59 ; PPC64: mtocrf 32, 12
60 ; PPC64: mtocrf 16, 12