1 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
2 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck %s --check-prefix=ELF64LE
3 ; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=970 | FileCheck %s --check-prefix=PPC970
5 ;; Tests for 970 don't use -fast-isel-abort because we intentionally punt
6 ;; to SelectionDAG in some cases.
10 define void @sitofp_single_i64(i64 %a, float %b) nounwind ssp {
12 ; ELF64: sitofp_single_i64
13 ; ELF64LE: sitofp_single_i64
14 ; PPC970: sitofp_single_i64
15 %b.addr = alloca float, align 4
16 %conv = sitofp i64 %a to float
27 store float %conv, float* %b.addr, align 4
31 define void @sitofp_single_i32(i32 %a, float %b) nounwind ssp {
33 ; ELF64: sitofp_single_i32
34 ; ELF64LE: sitofp_single_i32
35 ; PPC970: sitofp_single_i32
36 %b.addr = alloca float, align 4
37 %conv = sitofp i32 %a to float
39 ; stack offset used to load the float: 65524 = -16 + 4
40 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524
44 ; stack offset used to load the float: 65520 = -16 + 0
45 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520
52 store float %conv, float* %b.addr, align 4
56 define void @sitofp_single_i16(i16 %a, float %b) nounwind ssp {
58 ; ELF64: sitofp_single_i16
59 ; ELF64LE: sitofp_single_i16
60 ; PPC970: sitofp_single_i16
61 %b.addr = alloca float, align 4
62 %conv = sitofp i16 %a to float
76 store float %conv, float* %b.addr, align 4
80 define void @sitofp_single_i8(i8 %a) nounwind ssp {
82 ; ELF64: sitofp_single_i8
83 ; ELF64LE: sitofp_single_i8
84 ; PPC970: sitofp_single_i8
85 %b.addr = alloca float, align 4
86 %conv = sitofp i8 %a to float
100 store float %conv, float* %b.addr, align 4
104 define void @sitofp_double_i32(i32 %a, double %b) nounwind ssp {
106 ; ELF64: sitofp_double_i32
107 ; ELF64LE: sitofp_double_i32
108 ; PPC970: sitofp_double_i32
109 %b.addr = alloca double, align 8
110 %conv = sitofp i32 %a to double
112 ; stack offset used to load the float: 65524 = -16 + 4
113 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524
117 ; stack offset used to load the float: 65520 = -16 + 0
118 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520
124 store double %conv, double* %b.addr, align 8
128 define void @sitofp_double_i64(i64 %a, double %b) nounwind ssp {
130 ; ELF64: sitofp_double_i64
131 ; ELF64LE: sitofp_double_i64
132 ; PPC970: sitofp_double_i64
133 %b.addr = alloca double, align 8
134 %conv = sitofp i64 %a to double
144 store double %conv, double* %b.addr, align 8
148 define void @sitofp_double_i16(i16 %a, double %b) nounwind ssp {
150 ; ELF64: sitofp_double_i16
151 ; ELF64LE: sitofp_double_i16
152 ; PPC970: sitofp_double_i16
153 %b.addr = alloca double, align 8
154 %conv = sitofp i16 %a to double
167 store double %conv, double* %b.addr, align 8
171 define void @sitofp_double_i8(i8 %a, double %b) nounwind ssp {
173 ; ELF64: sitofp_double_i8
174 ; ELF64LE: sitofp_double_i8
175 ; PPC970: sitofp_double_i8
176 %b.addr = alloca double, align 8
177 %conv = sitofp i8 %a to double
190 store double %conv, double* %b.addr, align 8
196 define void @uitofp_single_i64(i64 %a, float %b) nounwind ssp {
198 ; ELF64: uitofp_single_i64
199 ; ELF64LE: uitofp_single_i64
200 ; PPC970: uitofp_single_i64
201 %b.addr = alloca float, align 4
202 %conv = uitofp i64 %a to float
209 ; PPC970-NOT: fcfidus
210 store float %conv, float* %b.addr, align 4
214 define void @uitofp_single_i32(i32 %a, float %b) nounwind ssp {
216 ; ELF64: uitofp_single_i32
217 ; ELF64LE: uitofp_single_i32
218 ; PPC970: uitofp_single_i32
219 %b.addr = alloca float, align 4
220 %conv = uitofp i32 %a to float
222 ; stack offset used to load the float: 65524 = -16 + 4
223 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524
227 ; stack offset used to load the float: 65520 = -16 + 0
228 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520
232 ; PPC970-NOT: fcfidus
233 store float %conv, float* %b.addr, align 4
237 define void @uitofp_single_i16(i16 %a, float %b) nounwind ssp {
239 ; ELF64: uitofp_single_i16
240 ; ELF64LE: uitofp_single_i16
241 ; PPC970: uitofp_single_i16
242 %b.addr = alloca float, align 4
243 %conv = uitofp i16 %a to float
244 ; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
248 ; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
252 ; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31
257 store float %conv, float* %b.addr, align 4
261 define void @uitofp_single_i8(i8 %a) nounwind ssp {
263 ; ELF64: uitofp_single_i8
264 ; ELF64LE: uitofp_single_i8
265 ; PPC970: uitofp_single_i8
266 %b.addr = alloca float, align 4
267 %conv = uitofp i8 %a to float
268 ; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
272 ; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
276 ; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31
281 store float %conv, float* %b.addr, align 4
285 define void @uitofp_double_i64(i64 %a, double %b) nounwind ssp {
287 ; ELF64: uitofp_double_i64
288 ; ELF64LE: uitofp_double_i64
289 ; PPC970: uitofp_double_i64
290 %b.addr = alloca double, align 8
291 %conv = uitofp i64 %a to double
299 store double %conv, double* %b.addr, align 8
303 define void @uitofp_double_i32(i32 %a, double %b) nounwind ssp {
305 ; ELF64: uitofp_double_i32
306 ; ELF64LE: uitofp_double_i32
307 ; PPC970: uitofp_double_i32
308 %b.addr = alloca double, align 8
309 %conv = uitofp i32 %a to double
311 ; stack offset used to load the float: 65524 = -16 + 4
312 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524
316 ; stack offset used to load the float: 65520 = -16 + 0
317 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520
322 store double %conv, double* %b.addr, align 8
326 define void @uitofp_double_i16(i16 %a, double %b) nounwind ssp {
328 ; ELF64: uitofp_double_i16
329 ; ELF64LE: uitofp_double_i16
330 ; PPC970: uitofp_double_i16
331 %b.addr = alloca double, align 8
332 %conv = uitofp i16 %a to double
333 ; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
337 ; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 48
341 ; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 16, 31
345 store double %conv, double* %b.addr, align 8
349 define void @uitofp_double_i8(i8 %a, double %b) nounwind ssp {
351 ; ELF64: uitofp_double_i8
352 ; ELF64LE: uitofp_double_i8
353 ; PPC970: uitofp_double_i8
354 %b.addr = alloca double, align 8
355 %conv = uitofp i8 %a to double
356 ; ELF64: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
360 ; ELF64LE: rldicl {{[0-9]+}}, {{[0-9]+}}, 0, 56
364 ; PPC970: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31
368 store double %conv, double* %b.addr, align 8
374 define void @fptosi_float_i32(float %a) nounwind ssp {
376 ; ELF64: fptosi_float_i32
377 ; ELF64LE: fptosi_float_i32
378 ; PPC970: fptosi_float_i32
379 %b.addr = alloca i32, align 4
380 %conv = fptosi float %a to i32
390 store i32 %conv, i32* %b.addr, align 4
394 define void @fptosi_float_i64(float %a) nounwind ssp {
396 ; ELF64: fptosi_float_i64
397 ; ELF64LE: fptosi_float_i64
398 ; PPC970: fptosi_float_i64
399 %b.addr = alloca i64, align 4
400 %conv = fptosi float %a to i64
410 store i64 %conv, i64* %b.addr, align 4
414 define void @fptosi_double_i32(double %a) nounwind ssp {
416 ; ELF64: fptosi_double_i32
417 ; ELF64LE: fptosi_double_i32
418 ; PPC970: fptosi_double_i32
419 %b.addr = alloca i32, align 8
420 %conv = fptosi double %a to i32
430 store i32 %conv, i32* %b.addr, align 8
434 define void @fptosi_double_i64(double %a) nounwind ssp {
436 ; ELF64: fptosi_double_i64
437 ; ELF64LE: fptosi_double_i64
438 ; PPC970: fptosi_double_i64
439 %b.addr = alloca i64, align 8
440 %conv = fptosi double %a to i64
450 store i64 %conv, i64* %b.addr, align 8
456 define void @fptoui_float_i32(float %a) nounwind ssp {
458 ; ELF64: fptoui_float_i32
459 ; ELF64LE: fptoui_float_i32
460 ; PPC970: fptoui_float_i32
461 %b.addr = alloca i32, align 4
462 %conv = fptoui float %a to i32
472 store i32 %conv, i32* %b.addr, align 4
476 define void @fptoui_float_i64(float %a) nounwind ssp {
478 ; ELF64: fptoui_float_i64
479 ; ELF64LE: fptoui_float_i64
480 ; PPC970: fptoui_float_i64
481 %b.addr = alloca i64, align 4
482 %conv = fptoui float %a to i64
489 ; PPC970-NOT: fctiduz
490 store i64 %conv, i64* %b.addr, align 4
494 define void @fptoui_double_i32(double %a) nounwind ssp {
496 ; ELF64: fptoui_double_i32
497 ; ELF64LE: fptoui_double_i32
498 ; PPC970: fptoui_double_i32
499 %b.addr = alloca i32, align 8
500 %conv = fptoui double %a to i32
510 store i32 %conv, i32* %b.addr, align 8
514 define void @fptoui_double_i64(double %a) nounwind ssp {
516 ; ELF64: fptoui_double_i64
517 ; ELF64LE: fptoui_double_i64
518 ; PPC970: fptoui_double_i64
519 %b.addr = alloca i64, align 8
520 %conv = fptoui double %a to i64
527 ; PPC970-NOT: fctiduz
528 store i64 %conv, i64* %b.addr, align 8