1 ; RUN: llc -O0 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \
2 ; RUN: elf-dump --dump-section-data | FileCheck %s
4 ; FIXME: When asm-parse is available, could make this an assembly test.
6 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
7 target triple = "powerpc64-unknown-linux-gnu"
9 @ei = external global i32
11 define signext i32 @test_external() nounwind {
13 %0 = load i32* @ei, align 4
14 %inc = add nsw i32 %0, 1
15 store i32 %inc, i32* @ei, align 4
19 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
20 ; accessing external variable ei.
24 ; CHECK-NEXT: 'r_offset'
25 ; CHECK-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]]
26 ; CHECK-NEXT: 'r_type', 0x00000032
28 ; CHECK-NEXT: 'r_offset'
29 ; CHECK-NEXT: 'r_sym', 0x[[SYM1]]
30 ; CHECK-NEXT: 'r_type', 0x00000040
32 @test_fn_static.si = internal global i32 0, align 4
34 define signext i32 @test_fn_static() nounwind {
36 %0 = load i32* @test_fn_static.si, align 4
37 %inc = add nsw i32 %0, 1
38 store i32 %inc, i32* @test_fn_static.si, align 4
42 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
43 ; accessing function-scoped variable si.
46 ; CHECK-NEXT: 'r_offset'
47 ; CHECK-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]]
48 ; CHECK-NEXT: 'r_type', 0x00000032
50 ; CHECK-NEXT: 'r_offset'
51 ; CHECK-NEXT: 'r_sym', 0x[[SYM2]]
52 ; CHECK-NEXT: 'r_type', 0x00000030
54 @gi = global i32 5, align 4
56 define signext i32 @test_file_static() nounwind {
58 %0 = load i32* @gi, align 4
59 %inc = add nsw i32 %0, 1
60 store i32 %inc, i32* @gi, align 4
64 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
65 ; accessing file-scope variable gi.
68 ; CHECK-NEXT: 'r_offset'
69 ; CHECK-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]]
70 ; CHECK-NEXT: 'r_type', 0x00000032
72 ; CHECK-NEXT: 'r_offset'
73 ; CHECK-NEXT: 'r_sym', 0x[[SYM3]]
74 ; CHECK-NEXT: 'r_type', 0x00000030
76 define double @test_double_const() nounwind {
78 ret double 0x3F4FD4920B498CF0
81 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for
82 ; accessing a constant.
85 ; CHECK-NEXT: 'r_offset'
86 ; CHECK-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]]
87 ; CHECK-NEXT: 'r_type', 0x00000032
89 ; CHECK-NEXT: 'r_offset'
90 ; CHECK-NEXT: 'r_sym', 0x[[SYM4]]
91 ; CHECK-NEXT: 'r_type', 0x00000030
93 define signext i32 @test_jump_table(i32 signext %i) nounwind {
95 %i.addr = alloca i32, align 4
96 store i32 %i, i32* %i.addr, align 4
97 %0 = load i32* %i.addr, align 4
98 switch i32 %0, label %sw.default [
105 sw.default: ; preds = %entry
108 sw.bb: ; preds = %entry
109 %1 = load i32* %i.addr, align 4
110 %mul = mul nsw i32 %1, 7
111 store i32 %mul, i32* %i.addr, align 4
114 sw.bb1: ; preds = %entry, %sw.bb
115 %2 = load i32* %i.addr, align 4
116 %dec = add nsw i32 %2, -1
117 store i32 %dec, i32* %i.addr, align 4
120 sw.bb2: ; preds = %entry, %sw.bb1
121 %3 = load i32* %i.addr, align 4
122 %add = add nsw i32 %3, 3
123 store i32 %add, i32* %i.addr, align 4
126 sw.bb3: ; preds = %entry, %sw.bb2
127 %4 = load i32* %i.addr, align 4
129 store i32 %shl, i32* %i.addr, align 4
132 sw.epilog: ; preds = %sw.bb3, %sw.default
133 %5 = load i32* %i.addr, align 4
137 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
138 ; accessing a jump table address.
140 ; CHECK: Relocation 8
141 ; CHECK-NEXT: 'r_offset'
142 ; CHECK-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]]
143 ; CHECK-NEXT: 'r_type', 0x00000032
144 ; CHECK: Relocation 9
145 ; CHECK-NEXT: 'r_offset'
146 ; CHECK-NEXT: 'r_sym', 0x[[SYM5]]
147 ; CHECK-NEXT: 'r_type', 0x00000040
149 @ti = common global i32 0, align 4
151 define signext i32 @test_tentative() nounwind {
153 %0 = load i32* @ti, align 4
154 %inc = add nsw i32 %0, 1
155 store i32 %inc, i32* @ti, align 4
159 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
160 ; accessing tentatively declared variable ti.
162 ; CHECK: Relocation 10
163 ; CHECK-NEXT: 'r_offset'
164 ; CHECK-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]]
165 ; CHECK-NEXT: 'r_type', 0x00000032
166 ; CHECK: Relocation 11
167 ; CHECK-NEXT: 'r_offset'
168 ; CHECK-NEXT: 'r_sym', 0x[[SYM6]]
169 ; CHECK-NEXT: 'r_type', 0x00000040
171 define i8* @test_fnaddr() nounwind {
173 %func = alloca i32 (i32)*, align 8
174 store i32 (i32)* @foo, i32 (i32)** %func, align 8
175 %0 = load i32 (i32)** %func, align 8
176 %1 = bitcast i32 (i32)* %0 to i8*
180 declare signext i32 @foo(i32 signext)
182 ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for
183 ; accessing function address foo.
185 ; CHECK: Relocation 12
186 ; CHECK-NEXT: 'r_offset'
187 ; CHECK-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]]
188 ; CHECK-NEXT: 'r_type', 0x00000032
189 ; CHECK: Relocation 13
190 ; CHECK-NEXT: 'r_offset'
191 ; CHECK-NEXT: 'r_sym', 0x[[SYM7]]
192 ; CHECK-NEXT: 'r_type', 0x00000040