1 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -disable-ppc-cmp-opt=0 | FileCheck %s
2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
3 target triple = "powerpc64-unknown-linux-gnu"
5 define signext i32 @foo(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 {
7 %sub = sub nsw i32 %a, %b
8 store i32 %sub, i32* %c, align 4
9 %cmp = icmp sgt i32 %a, %b
10 %cond = select i1 %cmp, i32 %a, i32 %b
17 define signext i32 @foo2(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 {
20 store i32 %shl, i32* %c, align 4
21 %cmp = icmp sgt i32 %shl, 0
22 %conv = zext i1 %cmp to i32
29 define i64 @fool(i64 %a, i64 %b, i64* nocapture %c) #0 {
31 %sub = sub nsw i64 %a, %b
32 store i64 %sub, i64* %c, align 8
33 %cmp = icmp sgt i64 %a, %b
34 %cond = select i1 %cmp, i64 %a, i64 %b
38 ; CHECK: subf. [[REG:[0-9]+]], 4, 3
39 ; CHECK: isel 3, 3, 4, 1
40 ; CHECK: std [[REG]], 0(5)
43 define i64 @foolb(i64 %a, i64 %b, i64* nocapture %c) #0 {
45 %sub = sub nsw i64 %a, %b
46 store i64 %sub, i64* %c, align 8
47 %cmp = icmp sle i64 %a, %b
48 %cond = select i1 %cmp, i64 %a, i64 %b
52 ; CHECK: subf. [[REG:[0-9]+]], 4, 3
53 ; CHECK: isel 3, 4, 3, 1
54 ; CHECK: std [[REG]], 0(5)
57 define i64 @foolc(i64 %a, i64 %b, i64* nocapture %c) #0 {
59 %sub = sub nsw i64 %b, %a
60 store i64 %sub, i64* %c, align 8
61 %cmp = icmp sgt i64 %a, %b
62 %cond = select i1 %cmp, i64 %a, i64 %b
66 ; CHECK: subf. [[REG:[0-9]+]], 3, 4
67 ; CHECK: isel 3, 3, 4, 0
68 ; CHECK: std [[REG]], 0(5)
71 define i64 @foold(i64 %a, i64 %b, i64* nocapture %c) #0 {
73 %sub = sub nsw i64 %b, %a
74 store i64 %sub, i64* %c, align 8
75 %cmp = icmp eq i64 %a, %b
76 %cond = select i1 %cmp, i64 %a, i64 %b
80 ; CHECK: subf. [[REG:[0-9]+]], 3, 4
81 ; CHECK: isel 3, 3, 4, 2
82 ; CHECK: std [[REG]], 0(5)
85 define i64 @foold2(i64 %a, i64 %b, i64* nocapture %c) #0 {
87 %sub = sub nsw i64 %a, %b
88 store i64 %sub, i64* %c, align 8
89 %cmp = icmp eq i64 %a, %b
90 %cond = select i1 %cmp, i64 %a, i64 %b
94 ; CHECK: subf. [[REG:[0-9]+]], 4, 3
95 ; CHECK: isel 3, 3, 4, 2
96 ; CHECK: std [[REG]], 0(5)
99 define i64 @foo2l(i64 %a, i64 %b, i64* nocapture %c) #0 {
101 %shl = shl i64 %a, %b
102 store i64 %shl, i64* %c, align 8
103 %cmp = icmp sgt i64 %shl, 0
104 %conv1 = zext i1 %cmp to i64
108 ; CHECK: sld. 4, 3, 4
112 define double @food(double %a, double %b, double* nocapture %c) #0 {
114 %sub = fsub double %a, %b
115 store double %sub, double* %c, align 8
116 %cmp = fcmp ogt double %a, %b
117 %cond = select i1 %cmp, double %a, double %b
121 ; CHECK-NOT: fsub. 0, 1, 2
122 ; CHECK: stfd 0, 0(5)
125 define float @foof(float %a, float %b, float* nocapture %c) #0 {
127 %sub = fsub float %a, %b
128 store float %sub, float* %c, align 4
129 %cmp = fcmp ogt float %a, %b
130 %cond = select i1 %cmp, float %a, float %b
134 ; CHECK-NOT: fsubs. 0, 1, 2
135 ; CHECK: stfs 0, 0(5)