1 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
2 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
4 ; Note: Lots of tests use inline asm instead of regular calls.
5 ; This allows to have a better control on what the allocation will do.
6 ; Otherwise, we may have spill right in the entry block, defeating
7 ; shrink-wrapping. Moreover, some of the inline asm statement (nop)
8 ; are here to ensure that the related paths do not end up as critical
12 ; Initial motivating example: Simple diamond with a call just on one side.
15 ; Compare the arguments and return
17 ; ENABLE: cmpw 0, 3, 4
18 ; ENABLE-NEXT: bgelr 0
21 ; At a minimum, we save/restore the link register. Other registers may be saved
25 ; Compare the arguments and jump to exit.
26 ; After the prologue is set.
27 ; DISABLE: cmpw 0, 3, 4
28 ; DISABLE-NEXT: bge 0, .[[EXIT_LABEL:LBB[0-9_]+]]
30 ; Store %a on the stack
31 ; CHECK: stw 3, {{[0-9]+([0-9]+)}}
32 ; Set the alloca address in the second argument.
33 ; CHECK-NEXT: addi 4, 1, {{[0-9]+}}
34 ; Set the first argument to zero.
36 ; CHECK-NEXT: bl doSomething
38 ; With shrink-wrapping, epilogue is just after the call.
39 ; Restore the link register and return.
40 ; Note that there could be other epilog code before the link register is
41 ; restored but we will not check for it here.
45 ; DISABLE: [[EXIT_LABEL]]:
47 ; Without shrink-wrapping, epilogue is in the exit block.
48 ; Epilogue code. (What we pop does not matter.)
53 define i32 @foo(i32 %a, i32 %b) {
54 %tmp = alloca i32, align 4
55 %tmp2 = icmp slt i32 %a, %b
56 br i1 %tmp2, label %true, label %false
59 store i32 %a, i32* %tmp, align 4
60 %tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
64 %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
68 ; Function Attrs: optsize
69 declare i32 @doSomething(i32, i32*)
73 ; Check that we do not perform the restore inside the loop whereas the save
75 ; CHECK-LABEL: freqSaveAndRestoreOutsideLoop:
77 ; Shrink-wrapping allows to skip the prologue in the else case.
78 ; ENABLE: cmplwi 0, 3, 0
79 ; ENABLE: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
82 ; Make sure we save the link register
85 ; DISABLE: cmplwi 0, 3, 0
86 ; DISABLE: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
89 ; CHECK-DAG: li [[SUM:[0-9]+]], 0
90 ; CHECK-DAG: li [[IV:[0-9]+]], 10
93 ; CHECK: .[[LOOP:LBB[0-9_]+]]: # %for.body
95 ; CHECK-DAG: addi [[IV]], [[IV]], -1
96 ; CHECK-DAG: add [[SUM]], 3, [[SUM]]
97 ; CHECK-NEXT: cmplwi [[IV]], 0
98 ; CHECK-NEXT: bne 0, .[[LOOP]]
101 ; CHECK: slwi 3, [[SUM]], 3
104 ; DISABLE: b .[[EPILOG_BB:LBB[0-9_]+]]
106 ; DISABLE: .[[ELSE_LABEL]]: # %if.else
107 ; Shift second argument by one and store into returned register.
108 ; DISABLE: slwi 3, 4, 1
109 ; DISABLE: .[[EPILOG_BB]]: # %if.end
115 ; ENABLE: .[[ELSE_LABEL]]: # %if.else
116 ; Shift second argument by one and store into returned register.
117 ; ENABLE: slwi 3, 4, 1
119 define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) {
121 %tobool = icmp eq i32 %cond, 0
122 br i1 %tobool, label %if.else, label %for.preheader
125 tail call void asm "nop", ""()
128 for.body: ; preds = %entry, %for.body
129 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %for.preheader ]
130 %sum.04 = phi i32 [ %add, %for.body ], [ 0, %for.preheader ]
131 %call = tail call i32 bitcast (i32 (...)* @something to i32 ()*)()
132 %add = add nsw i32 %call, %sum.04
133 %inc = add nuw nsw i32 %i.05, 1
134 %exitcond = icmp eq i32 %inc, 10
135 br i1 %exitcond, label %for.end, label %for.body
137 for.end: ; preds = %for.body
138 %shl = shl i32 %add, 3
141 if.else: ; preds = %entry
142 %mul = shl nsw i32 %N, 1
145 if.end: ; preds = %if.else, %for.end
146 %sum.1 = phi i32 [ %shl, %for.end ], [ %mul, %if.else ]
150 declare i32 @something(...)
152 ; Check that we do not perform the shrink-wrapping inside the loop even
153 ; though that would be legal. The cost model must prevent that.
154 ; CHECK-LABEL: freqSaveAndRestoreOutsideLoop2:
156 ; Make sure we save the link register before the call
160 ; CHECK-DAG: li [[SUM:[0-9]+]], 0
161 ; CHECK-DAG: li [[IV:[0-9]+]], 10
164 ; CHECK: .[[LOOP:LBB[0-9_]+]]: # %for.body
165 ; CHECK: bl something
166 ; CHECK-DAG: addi [[IV]], [[IV]], -1
167 ; CHECK-DAG: add [[SUM]], 3, [[SUM]]
168 ; CHECK-NEXT: cmplwi [[IV]], 0
169 ; CHECK-NEXT: bne 0, .[[LOOP]]
175 define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) {
177 br label %for.preheader
180 tail call void asm "nop", ""()
183 for.body: ; preds = %for.body, %entry
184 %i.04 = phi i32 [ 0, %for.preheader ], [ %inc, %for.body ]
185 %sum.03 = phi i32 [ 0, %for.preheader ], [ %add, %for.body ]
186 %call = tail call i32 bitcast (i32 (...)* @something to i32 ()*)()
187 %add = add nsw i32 %call, %sum.03
188 %inc = add nuw nsw i32 %i.04, 1
189 %exitcond = icmp eq i32 %inc, 10
190 br i1 %exitcond, label %for.exit, label %for.body
193 tail call void asm "nop", ""()
196 for.end: ; preds = %for.body
201 ; Check with a more complex case that we do not have save within the loop and
203 ; CHECK-LABEL: loopInfoSaveOutsideLoop:
205 ; ENABLE: cmplwi 0, 3, 0
206 ; ENABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
209 ; Make sure we save the link register
212 ; DISABLE: cmplwi 0, 3, 0
213 ; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
216 ; CHECK-DAG: li [[SUM:[0-9]+]], 0
217 ; CHECK-DAG: li [[IV:[0-9]+]], 10
220 ; CHECK: .[[LOOP:LBB[0-9_]+]]: # %for.body
221 ; CHECK: bl something
222 ; CHECK-DAG: addi [[IV]], [[IV]], -1
223 ; CHECK-DAG: add [[SUM]], 3, [[SUM]]
224 ; CHECK-NEXT: cmplwi [[IV]], 0
225 ; CHECK-NEXT: bne 0, .[[LOOP]]
228 ; CHECK: bl somethingElse
229 ; CHECK: slwi 3, [[SUM]], 3
232 ; DISABLE: b .[[EPILOG_BB:LBB[0-9_]+]]
234 ; DISABLE: .[[ELSE_LABEL]]: # %if.else
235 ; Shift second argument by one and store into returned register.
236 ; DISABLE: slwi 3, 4, 1
238 ; DISABLE: .[[EPILOG_BB]]: # %if.end
243 ; ENABLE: .[[ELSE_LABEL]]: # %if.else
244 ; Shift second argument by one and store into returned register.
245 ; ENABLE: slwi 3, 4, 1
247 define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) {
249 %tobool = icmp eq i32 %cond, 0
250 br i1 %tobool, label %if.else, label %for.preheader
253 tail call void asm "nop", ""()
256 for.body: ; preds = %entry, %for.body
257 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %for.preheader ]
258 %sum.04 = phi i32 [ %add, %for.body ], [ 0, %for.preheader ]
259 %call = tail call i32 bitcast (i32 (...)* @something to i32 ()*)()
260 %add = add nsw i32 %call, %sum.04
261 %inc = add nuw nsw i32 %i.05, 1
262 %exitcond = icmp eq i32 %inc, 10
263 br i1 %exitcond, label %for.end, label %for.body
265 for.end: ; preds = %for.body
266 tail call void bitcast (void (...)* @somethingElse to void ()*)()
267 %shl = shl i32 %add, 3
270 if.else: ; preds = %entry
271 %mul = shl nsw i32 %N, 1
274 if.end: ; preds = %if.else, %for.end
275 %sum.1 = phi i32 [ %shl, %for.end ], [ %mul, %if.else ]
279 declare void @somethingElse(...)
281 ; Check with a more complex case that we do not have restore within the loop and
283 ; CHECK-LABEL: loopInfoRestoreOutsideLoop:
285 ; ENABLE: cmplwi 0, 3, 0
286 ; ENABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
289 ; Make sure we save the link register
292 ; DISABLE: cmplwi 0, 3, 0
293 ; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
295 ; CHECK: bl somethingElse
298 ; CHECK-DAG: li [[SUM:[0-9]+]], 0
299 ; CHECK-DAG: li [[IV:[0-9]+]], 10
302 ; CHECK: .[[LOOP:LBB[0-9_]+]]: # %for.body
303 ; CHECK: bl something
304 ; CHECK-DAG: addi [[IV]], [[IV]], -1
305 ; CHECK-DAG: add [[SUM]], 3, [[SUM]]
306 ; CHECK-NEXT: cmplwi [[IV]], 0
307 ; CHECK-NEXT: bne 0, .[[LOOP]]
312 ; DISABLE: b .[[EPILOG_BB:LBB[0-9_]+]]
314 ; DISABLE: .[[ELSE_LABEL]]: # %if.else
315 ; Shift second argument by one and store into returned register.
316 ; DISABLE: slwi 3, 4, 1
317 ; DISABLE: .[[EPILOG_BB]]: # %if.end
323 ; ENABLE: .[[ELSE_LABEL]]: # %if.else
324 ; Shift second argument by one and store into returned register.
325 ; ENABLE: slwi 3, 4, 1
327 define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) #0 {
329 %tobool = icmp eq i32 %cond, 0
330 br i1 %tobool, label %if.else, label %if.then
332 if.then: ; preds = %entry
333 tail call void bitcast (void (...)* @somethingElse to void ()*)()
336 for.body: ; preds = %for.body, %if.then
337 %i.05 = phi i32 [ 0, %if.then ], [ %inc, %for.body ]
338 %sum.04 = phi i32 [ 0, %if.then ], [ %add, %for.body ]
339 %call = tail call i32 bitcast (i32 (...)* @something to i32 ()*)()
340 %add = add nsw i32 %call, %sum.04
341 %inc = add nuw nsw i32 %i.05, 1
342 %exitcond = icmp eq i32 %inc, 10
343 br i1 %exitcond, label %for.end, label %for.body
345 for.end: ; preds = %for.body
346 %shl = shl i32 %add, 3
349 if.else: ; preds = %entry
350 %mul = shl nsw i32 %N, 1
353 if.end: ; preds = %if.else, %for.end
354 %sum.1 = phi i32 [ %shl, %for.end ], [ %mul, %if.else ]
358 ; Check that we handle function with no frame information correctly.
359 ; CHECK-LABEL: emptyFrame:
361 ; CHECK-NEXT: li 3, 0
363 define i32 @emptyFrame() {
369 ; Check that we handle inline asm correctly.
370 ; CHECK-LABEL: inlineAsm:
372 ; ENABLE: cmplwi 0, 3, 0
373 ; ENABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
376 ; Make sure we save the CSR used in the inline asm: r14
377 ; ENABLE-DAG: li [[IV:[0-9]+]], 10
378 ; ENABLE-DAG: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
380 ; DISABLE: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
381 ; DISABLE: cmplwi 0, 3, 0
382 ; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
383 ; DISABLE: li [[IV:[0-9]+]], 10
386 ; CHECK: mtctr [[IV]]
388 ; CHECK: .[[LOOP_LABEL:LBB[0-9_]+]]: # %for.body
389 ; Inline asm statement.
390 ; CHECK: addi 14, 14, 1
391 ; CHECK: bdnz .[[LOOP_LABEL]]
395 ; CHECK-DAG: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
399 ; CHECK: [[ELSE_LABEL]]
400 ; CHECK-NEXT: slwi 3, 4, 1
401 ; DISABLE: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
404 define i32 @inlineAsm(i32 %cond, i32 %N) {
406 %tobool = icmp eq i32 %cond, 0
407 br i1 %tobool, label %if.else, label %for.preheader
410 tail call void asm "nop", ""()
413 for.body: ; preds = %entry, %for.body
414 %i.03 = phi i32 [ %inc, %for.body ], [ 0, %for.preheader ]
415 tail call void asm "addi 14, 14, 1", "~{r14}"()
416 %inc = add nuw nsw i32 %i.03, 1
417 %exitcond = icmp eq i32 %inc, 10
418 br i1 %exitcond, label %for.exit, label %for.body
421 tail call void asm "nop", ""()
424 if.else: ; preds = %entry
425 %mul = shl nsw i32 %N, 1
428 if.end: ; preds = %for.body, %if.else
429 %sum.0 = phi i32 [ %mul, %if.else ], [ 0, %for.exit ]
434 ; Check that we handle calls to variadic functions correctly.
435 ; CHECK-LABEL: callVariadicFunc:
437 ; ENABLE: cmplwi 0, 3, 0
438 ; ENABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
443 ; DISABLE: cmplwi 0, 3, 0
444 ; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
446 ; Setup of the varags.
448 ; CHECK-NEXT: mr 5, 3
449 ; CHECK-NEXT: mr 6, 3
450 ; CHECK-NEXT: mr 7, 3
451 ; CHECK-NEXT: mr 8, 3
452 ; CHECK-NEXT: mr 9, 3
453 ; CHECK-NEXT: bl someVariadicFunc
454 ; CHECK: slwi 3, 3, 3
455 ; DISABLE: b .[[EPILOGUE_BB:LBB[0-9_]+]]
460 ; CHECK: .[[ELSE_LABEL]]: # %if.else
461 ; CHECK-NEXT: slwi 3, 4, 1
463 ; DISABLE: .[[EPILOGUE_BB]]: # %if.end
466 define i32 @callVariadicFunc(i32 %cond, i32 %N) {
468 %tobool = icmp eq i32 %cond, 0
469 br i1 %tobool, label %if.else, label %if.then
471 if.then: ; preds = %entry
472 %call = tail call i32 (i32, ...) @someVariadicFunc(i32 %N, i32 %N, i32 %N, i32 %N, i32 %N, i32 %N, i32 %N)
473 %shl = shl i32 %call, 3
476 if.else: ; preds = %entry
477 %mul = shl nsw i32 %N, 1
480 if.end: ; preds = %if.else, %if.then
481 %sum.0 = phi i32 [ %shl, %if.then ], [ %mul, %if.else ]
485 declare i32 @someVariadicFunc(i32, ...)
489 ; Make sure we do not insert unreachable code after noreturn function.
490 ; Although this is not incorrect to insert such code, it is useless
491 ; and it hurts the binary size.
493 ; CHECK-LABEL: noreturn:
497 ; CHECK-NEXT: bne 0, .[[ABORT:LBB[0-9_]+]]
505 ; CHECK: .[[ABORT]]: # %if.abort
511 define i32 @noreturn(i8 signext %bad_thing) {
513 %tobool = icmp eq i8 %bad_thing, 0
514 br i1 %tobool, label %if.end, label %if.abort
517 tail call void @abort() #0
524 declare void @abort() #0
526 attributes #0 = { noreturn nounwind }
529 ; Make sure that we handle infinite loops properly When checking that the Save
530 ; and Restore blocks are control flow equivalent, the loop searches for the
531 ; immediate (post) dominator for the (restore) save blocks. When either the Save
532 ; or Restore block is located in an infinite loop the only immediate (post)
533 ; dominator is itself. In this case, we cannot perform shrink wrapping, but we
534 ; should return gracefully and continue compilation.
535 ; The only condition for this test is the compilation finishes correctly.
537 ; CHECK-LABEL: infiniteloop
539 define void @infiniteloop() {
541 br i1 undef, label %if.then, label %if.end
544 %ptr = alloca i32, i32 4
547 for.body: ; preds = %for.body, %entry
548 %sum.03 = phi i32 [ 0, %if.then ], [ %add, %for.body ]
549 %call = tail call i32 bitcast (i32 (...)* @something to i32 ()*)()
550 %add = add nsw i32 %call, %sum.03
551 store i32 %add, i32* %ptr