1 ; RUN: llc < %s -march=ppc64le -mcpu=pwr8 -mattr=+altivec -mattr=-vsx | FileCheck %s
2 ; RUN: llc < %s -march=ppc64le -mattr=+altivec -mattr=-vsx | FileCheck %s
4 ; Currently VSX support is disabled for this test because we generate lxsdx
5 ; instead of lfd, and stxsdx instead of stfd. That is a poor choice when we
6 ; have reg+imm addressing, and is on the list of things to be fixed.
7 ; The second run step is to ensure that -march=ppc64le is adequate to select
8 ; the same feature set as with -mcpu=pwr8 since that is the baseline for ppc64le.
10 target datalayout = "e-m:e-i64:64-n32:64"
11 target triple = "powerpc64le-unknown-linux-gnu"
14 ; Verify use of registers for float/vector aggregate return.
17 define [8 x float] @return_float([8 x float] %x) {
21 ; CHECK-LABEL: @return_float
25 define [8 x double] @return_double([8 x double] %x) {
29 ; CHECK-LABEL: @return_double
33 define [4 x ppc_fp128] @return_ppcf128([4 x ppc_fp128] %x) {
35 ret [4 x ppc_fp128] %x
37 ; CHECK-LABEL: @return_ppcf128
41 define [8 x <4 x i32>] @return_v4i32([8 x <4 x i32>] %x) {
43 ret [8 x <4 x i32>] %x
45 ; CHECK-LABEL: @return_v4i32
51 ; Verify amount of space taken up by aggregates in the parameter save area.
54 define i64 @callee_float([7 x float] %a, [7 x float] %b, i64 %c) {
58 ; CHECK-LABEL: @callee_float
62 define void @caller_float(i64 %x, [7 x float] %y) {
64 tail call void @test_float([7 x float] %y, [7 x float] %y, i64 %x)
67 ; CHECK-LABEL: @caller_float
69 ; CHECK: bl test_float
71 declare void @test_float([7 x float], [7 x float], i64)
73 define i64 @callee_double(i64 %a, [7 x double] %b, i64 %c) {
77 ; CHECK-LABEL: @callee_double
81 define void @caller_double(i64 %x, [7 x double] %y) {
83 tail call void @test_double(i64 %x, [7 x double] %y, i64 %x)
86 ; CHECK-LABEL: @caller_double
88 ; CHECK: bl test_double
90 declare void @test_double(i64, [7 x double], i64)
92 define i64 @callee_ppcf128(i64 %a, [4 x ppc_fp128] %b, i64 %c) {
96 ; CHECK-LABEL: @callee_ppcf128
100 define void @caller_ppcf128(i64 %x, [4 x ppc_fp128] %y) {
102 tail call void @test_ppcf128(i64 %x, [4 x ppc_fp128] %y, i64 %x)
105 ; CHECK-LABEL: @caller_ppcf128
106 ; CHECK: std 3, 104(1)
107 ; CHECK: bl test_ppcf128
109 declare void @test_ppcf128(i64, [4 x ppc_fp128], i64)
111 define i64 @callee_i64(i64 %a, [7 x i64] %b, i64 %c) {
115 ; CHECK-LABEL: @callee_i64
119 define void @caller_i64(i64 %x, [7 x i64] %y) {
121 tail call void @test_i64(i64 %x, [7 x i64] %y, i64 %x)
124 ; CHECK-LABEL: @caller_i64
125 ; CHECK: std 3, 96(1)
128 declare void @test_i64(i64, [7 x i64], i64)
130 define i64 @callee_i128(i64 %a, [4 x i128] %b, i64 %c) {
134 ; CHECK-LABEL: @callee_i128
135 ; CHECK: ld 3, 112(1)
138 define void @caller_i128(i64 %x, [4 x i128] %y) {
140 tail call void @test_i128(i64 %x, [4 x i128] %y, i64 %x)
143 ; CHECK-LABEL: @caller_i128
144 ; CHECK: std 3, 112(1)
145 ; CHECK: bl test_i128
147 declare void @test_i128(i64, [4 x i128], i64)
149 define i64 @callee_v4i32(i64 %a, [4 x <4 x i32>] %b, i64 %c) {
153 ; CHECK-LABEL: @callee_v4i32
154 ; CHECK: ld 3, 112(1)
157 define void @caller_v4i32(i64 %x, [4 x <4 x i32>] %y) {
159 tail call void @test_v4i32(i64 %x, [4 x <4 x i32>] %y, i64 %x)
162 ; CHECK-LABEL: @caller_v4i32
163 ; CHECK: std 3, 112(1)
164 ; CHECK: bl test_v4i32
166 declare void @test_v4i32(i64, [4 x <4 x i32>], i64)
170 ; Verify handling of floating point arguments in GPRs
173 %struct.float8 = type { [8 x float] }
174 %struct.float5 = type { [5 x float] }
175 %struct.float2 = type { [2 x float] }
177 @g8 = common global %struct.float8 zeroinitializer, align 4
178 @g5 = common global %struct.float5 zeroinitializer, align 4
179 @g2 = common global %struct.float2 zeroinitializer, align 4
181 define float @callee0([7 x float] %a, [7 x float] %b) {
183 %b.extract = extractvalue [7 x float] %b, 6
186 ; CHECK-LABEL: @callee0
187 ; CHECK: stw 10, [[OFF:.*]](1)
188 ; CHECK: lfs 1, [[OFF]](1)
191 define void @caller0([7 x float] %a) {
193 tail call void @test0([7 x float] %a, [7 x float] %a)
196 ; CHECK-LABEL: @caller0
197 ; CHECK-DAG: fmr 8, 1
198 ; CHECK-DAG: fmr 9, 2
199 ; CHECK-DAG: fmr 10, 3
200 ; CHECK-DAG: fmr 11, 4
201 ; CHECK-DAG: fmr 12, 5
202 ; CHECK-DAG: fmr 13, 6
203 ; CHECK-DAG: stfs 7, [[OFF:[0-9]+]](1)
204 ; CHECK-DAG: lwz 10, [[OFF]](1)
207 declare void @test0([7 x float], [7 x float])
209 define float @callee1([8 x float] %a, [8 x float] %b) {
211 %b.extract = extractvalue [8 x float] %b, 7
214 ; CHECK-LABEL: @callee1
215 ; CHECK: rldicl [[REG:[0-9]+]], 10, 32, 32
216 ; CHECK: stw [[REG]], [[OFF:.*]](1)
217 ; CHECK: lfs 1, [[OFF]](1)
220 define void @caller1([8 x float] %a) {
222 tail call void @test1([8 x float] %a, [8 x float] %a)
225 ; CHECK-LABEL: @caller1
226 ; CHECK-DAG: fmr 9, 1
227 ; CHECK-DAG: fmr 10, 2
228 ; CHECK-DAG: fmr 11, 3
229 ; CHECK-DAG: fmr 12, 4
230 ; CHECK-DAG: fmr 13, 5
231 ; CHECK-DAG: stfs 5, [[OFF0:[0-9]+]](1)
232 ; CHECK-DAG: stfs 6, [[OFF1:[0-9]+]](1)
233 ; CHECK-DAG: stfs 7, [[OFF2:[0-9]+]](1)
234 ; CHECK-DAG: stfs 8, [[OFF3:[0-9]+]](1)
235 ; CHECK-DAG: lwz [[REG0:[0-9]+]], [[OFF0]](1)
236 ; CHECK-DAG: lwz [[REG1:[0-9]+]], [[OFF1]](1)
237 ; CHECK-DAG: lwz [[REG2:[0-9]+]], [[OFF2]](1)
238 ; CHECK-DAG: lwz [[REG3:[0-9]+]], [[OFF3]](1)
239 ; CHECK-DAG: sldi [[REG1]], [[REG1]], 32
240 ; CHECK-DAG: sldi [[REG3]], [[REG3]], 32
241 ; CHECK-DAG: or 9, [[REG0]], [[REG1]]
242 ; CHECK-DAG: or 10, [[REG2]], [[REG3]]
245 declare void @test1([8 x float], [8 x float])
247 define float @callee2([8 x float] %a, [5 x float] %b, [2 x float] %c) {
249 %c.extract = extractvalue [2 x float] %c, 1
252 ; CHECK-LABEL: @callee2
253 ; CHECK: rldicl [[REG:[0-9]+]], 10, 32, 32
254 ; CHECK: stw [[REG]], [[OFF:.*]](1)
255 ; CHECK: lfs 1, [[OFF]](1)
258 define void @caller2() {
260 %0 = load [8 x float], [8 x float]* getelementptr inbounds (%struct.float8, %struct.float8* @g8, i64 0, i32 0), align 4
261 %1 = load [5 x float], [5 x float]* getelementptr inbounds (%struct.float5, %struct.float5* @g5, i64 0, i32 0), align 4
262 %2 = load [2 x float], [2 x float]* getelementptr inbounds (%struct.float2, %struct.float2* @g2, i64 0, i32 0), align 4
263 tail call void @test2([8 x float] %0, [5 x float] %1, [2 x float] %2)
266 ; CHECK-LABEL: @caller2
267 ; CHECK: ld {{[0-9]+}}, .LC
268 ; CHECK-DAG: lfs 1, 0({{[0-9]+}})
269 ; CHECK-DAG: lfs 2, 4({{[0-9]+}})
270 ; CHECK-DAG: lfs 3, 8({{[0-9]+}})
271 ; CHECK-DAG: lfs 4, 12({{[0-9]+}})
272 ; CHECK-DAG: lfs 5, 16({{[0-9]+}})
273 ; CHECK-DAG: lfs 6, 20({{[0-9]+}})
274 ; CHECK-DAG: lfs 7, 24({{[0-9]+}})
275 ; CHECK-DAG: lfs 8, 28({{[0-9]+}})
277 ; CHECK-DAG: lfs 9, 0({{[0-9]+}})
278 ; CHECK-DAG: lfs 10, 4({{[0-9]+}})
279 ; CHECK-DAG: lfs 11, 8({{[0-9]+}})
280 ; CHECK-DAG: lfs 12, 12({{[0-9]+}})
281 ; CHECK-DAG: lfs 13, 16({{[0-9]+}})
283 ; CHECK-DAG: lwz [[REG0:[0-9]+]], 0({{[0-9]+}})
284 ; CHECK-DAG: lwz [[REG1:[0-9]+]], 4({{[0-9]+}})
285 ; CHECK-DAG: sldi [[REG2:[0-9]+]], [[REG1]], 32
286 ; CHECK-DAG: or 10, [[REG0]], [[REG2]]
289 declare void @test2([8 x float], [5 x float], [2 x float])
291 define double @callee3([8 x float] %a, [5 x float] %b, double %c) {
295 ; CHECK-LABEL: @callee3
296 ; CHECK: std 10, [[OFF:.*]](1)
297 ; CHECK: lfd 1, [[OFF]](1)
300 define void @caller3(double %d) {
302 %0 = load [8 x float], [8 x float]* getelementptr inbounds (%struct.float8, %struct.float8* @g8, i64 0, i32 0), align 4
303 %1 = load [5 x float], [5 x float]* getelementptr inbounds (%struct.float5, %struct.float5* @g5, i64 0, i32 0), align 4
304 tail call void @test3([8 x float] %0, [5 x float] %1, double %d)
307 ; CHECK-LABEL: @caller3
308 ; CHECK: stfd 1, [[OFF:.*]](1)
309 ; CHECK: ld 10, [[OFF]](1)
312 declare void @test3([8 x float], [5 x float], double)
314 define float @callee4([8 x float] %a, [5 x float] %b, float %c) {
318 ; CHECK-LABEL: @callee4
319 ; CHECK: stw 10, [[OFF:.*]](1)
320 ; CHECK: lfs 1, [[OFF]](1)
323 define void @caller4(float %f) {
325 %0 = load [8 x float], [8 x float]* getelementptr inbounds (%struct.float8, %struct.float8* @g8, i64 0, i32 0), align 4
326 %1 = load [5 x float], [5 x float]* getelementptr inbounds (%struct.float5, %struct.float5* @g5, i64 0, i32 0), align 4
327 tail call void @test4([8 x float] %0, [5 x float] %1, float %f)
330 ; CHECK-LABEL: @caller4
331 ; CHECK: stfs 1, [[OFF:.*]](1)
332 ; CHECK: lwz 10, [[OFF]](1)
335 declare void @test4([8 x float], [5 x float], float)