1 ; RUN: llc -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s
3 ; Check vector comparisons using altivec. For non native types, just basic
4 ; comparison instruction check is done. For altivec supported type (16i8,
5 ; 8i16, 4i32, and 4f32) all the comparisons operators (==, !=, >, >=, <, <=)
9 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
10 target triple = "powerpc64-unknown-linux-gnu"
12 define <2 x i8> @v2si8_cmp(<2 x i8> %x, <2 x i8> %y) nounwind readnone {
13 %cmp = icmp eq <2 x i8> %x, %y
14 %sext = sext <2 x i1> %cmp to <2 x i8>
18 ; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
21 define <4 x i8> @v4si8_cmp(<4 x i8> %x, <4 x i8> %y) nounwind readnone {
22 %cmp = icmp eq <4 x i8> %x, %y
23 %sext = sext <4 x i1> %cmp to <4 x i8>
27 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
30 define <8 x i8> @v8si8_cmp(<8 x i8> %x, <8 x i8> %y) nounwind readnone {
31 %cmp = icmp eq <8 x i8> %x, %y
32 %sext = sext <8 x i1> %cmp to <8 x i8>
36 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
39 ; Adicional tests for v16i8 since it is a altivec native type
41 define <16 x i8> @v16si8_cmp_eq(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
42 %cmp = icmp eq <16 x i8> %x, %y
43 %sext = sext <16 x i1> %cmp to <16 x i8>
46 ; CHECK: v16si8_cmp_eq:
47 ; CHECK: vcmpequb 2, 2, 3
49 define <16 x i8> @v16si8_cmp_ne(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
51 %cmp = icmp ne <16 x i8> %x, %y
52 %sext = sext <16 x i1> %cmp to <16 x i8>
55 ; CHECK: v16si8_cmp_ne:
56 ; CHECK: vcmpequb [[RET:[0-9]+]], 2, 3
57 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
59 define <16 x i8> @v16si8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
61 %cmp = icmp sle <16 x i8> %x, %y
62 %sext = sext <16 x i1> %cmp to <16 x i8>
65 ; CHECK: v16si8_cmp_le:
66 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
67 ; CHECK-NEXT: vcmpgtsb [[RCMPLE:[0-9]+]], 3, 2
68 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
70 define <16 x i8> @v16ui8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
72 %cmp = icmp ule <16 x i8> %x, %y
73 %sext = sext <16 x i1> %cmp to <16 x i8>
76 ; CHECK: v16ui8_cmp_le:
77 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
78 ; CHECK-NEXT: vcmpgtub [[RCMPLE:[0-9]+]], 3, 2
79 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
81 define <16 x i8> @v16si8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
83 %cmp = icmp slt <16 x i8> %x, %y
84 %sext = sext <16 x i1> %cmp to <16 x i8>
87 ; CHECK: v16si8_cmp_lt:
88 ; CHECK: vcmpgtsb 2, 3, 2
90 define <16 x i8> @v16ui8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
92 %cmp = icmp ult <16 x i8> %x, %y
93 %sext = sext <16 x i1> %cmp to <16 x i8>
96 ; CHECK: v16ui8_cmp_lt:
97 ; CHECK: vcmpgtub 2, 3, 2
99 define <16 x i8> @v16si8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
101 %cmp = icmp sgt <16 x i8> %x, %y
102 %sext = sext <16 x i1> %cmp to <16 x i8>
105 ; CHECK: v16si8_cmp_gt:
106 ; CHECK: vcmpgtsb 2, 2, 3
108 define <16 x i8> @v16ui8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
110 %cmp = icmp ugt <16 x i8> %x, %y
111 %sext = sext <16 x i1> %cmp to <16 x i8>
114 ; CHECK: v16ui8_cmp_gt:
115 ; CHECK: vcmpgtub 2, 2, 3
117 define <16 x i8> @v16si8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
119 %cmp = icmp sge <16 x i8> %x, %y
120 %sext = sext <16 x i1> %cmp to <16 x i8>
123 ; CHECK: v16si8_cmp_ge:
124 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
125 ; CHECK-NEXT: vcmpgtsb [[RCMPGT:[0-9]+]], 2, 3
126 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
128 define <16 x i8> @v16ui8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {
130 %cmp = icmp uge <16 x i8> %x, %y
131 %sext = sext <16 x i1> %cmp to <16 x i8>
134 ; CHECK: v16ui8_cmp_ge:
135 ; CHECK: vcmpequb [[RCMPEQ:[0-9]+]], 2, 3
136 ; CHECK-NEXT: vcmpgtub [[RCMPGT:[0-9]+]], 2, 3
137 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
140 define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone {
141 %cmp = icmp eq <32 x i8> %x, %y
142 %sext = sext <32 x i1> %cmp to <32 x i8>
146 ; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
147 ; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
150 define <2 x i16> @v2si16_cmp(<2 x i16> %x, <2 x i16> %y) nounwind readnone {
151 %cmp = icmp eq <2 x i16> %x, %y
152 %sext = sext <2 x i1> %cmp to <2 x i16>
156 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
159 define <4 x i16> @v4si16_cmp(<4 x i16> %x, <4 x i16> %y) nounwind readnone {
160 %cmp = icmp eq <4 x i16> %x, %y
161 %sext = sext <4 x i1> %cmp to <4 x i16>
165 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
168 ; Adicional tests for v8i16 since it is an altivec native type
170 define <8 x i16> @v8si16_cmp_eq(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
172 %cmp = icmp eq <8 x i16> %x, %y
173 %sext = sext <8 x i1> %cmp to <8 x i16>
176 ; CHECK: v8si16_cmp_eq:
177 ; CHECK: vcmpequh 2, 2, 3
179 define <8 x i16> @v8si16_cmp_ne(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
181 %cmp = icmp ne <8 x i16> %x, %y
182 %sext = sext <8 x i1> %cmp to <8 x i16>
185 ; CHECK: v8si16_cmp_ne:
186 ; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3
187 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
189 define <8 x i16> @v8si16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
191 %cmp = icmp sle <8 x i16> %x, %y
192 %sext = sext <8 x i1> %cmp to <8 x i16>
195 ; CHECK: v8si16_cmp_le:
196 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
197 ; CHECK-NEXT: vcmpgtsh [[RCMPLE:[0-9]+]], 3, 2
198 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
200 define <8 x i16> @v8ui16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
202 %cmp = icmp ule <8 x i16> %x, %y
203 %sext = sext <8 x i1> %cmp to <8 x i16>
206 ; CHECK: v8ui16_cmp_le:
207 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
208 ; CHECK-NEXT: vcmpgtuh [[RCMPLE:[0-9]+]], 3, 2
209 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
211 define <8 x i16> @v8si16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
213 %cmp = icmp slt <8 x i16> %x, %y
214 %sext = sext <8 x i1> %cmp to <8 x i16>
217 ; CHECK: v8si16_cmp_lt:
218 ; CHECK: vcmpgtsh 2, 3, 2
220 define <8 x i16> @v8ui16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
222 %cmp = icmp ult <8 x i16> %x, %y
223 %sext = sext <8 x i1> %cmp to <8 x i16>
226 ; CHECK: v8ui16_cmp_lt:
227 ; CHECK: vcmpgtuh 2, 3, 2
229 define <8 x i16> @v8si16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
231 %cmp = icmp sgt <8 x i16> %x, %y
232 %sext = sext <8 x i1> %cmp to <8 x i16>
235 ; CHECK: v8si16_cmp_gt:
236 ; CHECK: vcmpgtsh 2, 2, 3
238 define <8 x i16> @v8ui16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
240 %cmp = icmp ugt <8 x i16> %x, %y
241 %sext = sext <8 x i1> %cmp to <8 x i16>
244 ; CHECK: v8ui16_cmp_gt:
245 ; CHECK: vcmpgtuh 2, 2, 3
247 define <8 x i16> @v8si16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
249 %cmp = icmp sge <8 x i16> %x, %y
250 %sext = sext <8 x i1> %cmp to <8 x i16>
253 ; CHECK: v8si16_cmp_ge:
254 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
255 ; CHECK-NEXT: vcmpgtsh [[RCMPGT:[0-9]+]], 2, 3
256 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
258 define <8 x i16> @v8ui16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {
260 %cmp = icmp uge <8 x i16> %x, %y
261 %sext = sext <8 x i1> %cmp to <8 x i16>
264 ; CHECK: v8ui16_cmp_ge:
265 ; CHECK: vcmpequh [[RCMPEQ:[0-9]+]], 2, 3
266 ; CHECK-NEXT: vcmpgtuh [[RCMPGT:[0-9]+]], 2, 3
267 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
270 define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone {
271 %cmp = icmp eq <16 x i16> %x, %y
272 %sext = sext <16 x i1> %cmp to <16 x i16>
275 ; CHECK: v16si16_cmp:
276 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
277 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
280 define <32 x i16> @v32si16_cmp(<32 x i16> %x, <32 x i16> %y) nounwind readnone {
281 %cmp = icmp eq <32 x i16> %x, %y
282 %sext = sext <32 x i1> %cmp to <32 x i16>
285 ; CHECK: v32si16_cmp:
286 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
287 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
288 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
289 ; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
292 define <2 x i32> @v2si32_cmp(<2 x i32> %x, <2 x i32> %y) nounwind readnone {
293 %cmp = icmp eq <2 x i32> %x, %y
294 %sext = sext <2 x i1> %cmp to <2 x i32>
298 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
301 ; Adicional tests for v4si32 since it is an altivec native type
303 define <4 x i32> @v4si32_cmp_eq(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
305 %cmp = icmp eq <4 x i32> %x, %y
306 %sext = sext <4 x i1> %cmp to <4 x i32>
309 ; CHECK: v4si32_cmp_eq:
310 ; CHECK: vcmpequw 2, 2, 3
312 define <4 x i32> @v4si32_cmp_ne(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
314 %cmp = icmp ne <4 x i32> %x, %y
315 %sext = sext <4 x i1> %cmp to <4 x i32>
318 ; CHECK: v4si32_cmp_ne:
319 ; CHECK: vcmpequw [[RCMP:[0-9]+]], 2, 3
320 ; CHECK-NEXT: vnor 2, [[RCMP]], [[RCMP]]
322 define <4 x i32> @v4si32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
324 %cmp = icmp sle <4 x i32> %x, %y
325 %sext = sext <4 x i1> %cmp to <4 x i32>
328 ; CHECK: v4si32_cmp_le:
329 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
330 ; CHECK-NEXT: vcmpgtsw [[RCMPLE:[0-9]+]], 3, 2
331 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
333 define <4 x i32> @v4ui32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
335 %cmp = icmp ule <4 x i32> %x, %y
336 %sext = sext <4 x i1> %cmp to <4 x i32>
339 ; CHECK: v4ui32_cmp_le:
340 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
341 ; CHECK-NEXT: vcmpgtuw [[RCMPLE:[0-9]+]], 3, 2
342 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
344 define <4 x i32> @v4si32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
346 %cmp = icmp slt <4 x i32> %x, %y
347 %sext = sext <4 x i1> %cmp to <4 x i32>
350 ; CHECK: v4si32_cmp_lt:
351 ; CHECK: vcmpgtsw 2, 3, 2
353 define <4 x i32> @v4ui32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
355 %cmp = icmp ult <4 x i32> %x, %y
356 %sext = sext <4 x i1> %cmp to <4 x i32>
359 ; CHECK: v4ui32_cmp_lt:
360 ; CHECK: vcmpgtuw 2, 3, 2
362 define <4 x i32> @v4si32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
364 %cmp = icmp sgt <4 x i32> %x, %y
365 %sext = sext <4 x i1> %cmp to <4 x i32>
368 ; CHECK: v4si32_cmp_gt:
369 ; CHECK: vcmpgtsw 2, 2, 3
371 define <4 x i32> @v4ui32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
373 %cmp = icmp ugt <4 x i32> %x, %y
374 %sext = sext <4 x i1> %cmp to <4 x i32>
377 ; CHECK: v4ui32_cmp_gt:
378 ; CHECK: vcmpgtuw 2, 2, 3
380 define <4 x i32> @v4si32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
382 %cmp = icmp sge <4 x i32> %x, %y
383 %sext = sext <4 x i1> %cmp to <4 x i32>
386 ; CHECK: v4si32_cmp_ge:
387 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
388 ; CHECK-NEXT: vcmpgtsw [[RCMPGT:[0-9]+]], 2, 3
389 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
391 define <4 x i32> @v4ui32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {
393 %cmp = icmp uge <4 x i32> %x, %y
394 %sext = sext <4 x i1> %cmp to <4 x i32>
397 ; CHECK: v4ui32_cmp_ge:
398 ; CHECK: vcmpequw [[RCMPEQ:[0-9]+]], 2, 3
399 ; CHECK-NEXT: vcmpgtuw [[RCMPGT:[0-9]+]], 2, 3
400 ; CHECK-NEXT: vor 2, [[RCMPGT]], [[RCMPEQ]]
403 define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone {
404 %cmp = icmp eq <8 x i32> %x, %y
405 %sext = sext <8 x i1> %cmp to <8 x i32>
409 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
410 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
413 define <16 x i32> @v16si32_cmp(<16 x i32> %x, <16 x i32> %y) nounwind readnone {
414 %cmp = icmp eq <16 x i32> %x, %y
415 %sext = sext <16 x i1> %cmp to <16 x i32>
418 ; CHECK: v16si32_cmp:
419 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
420 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
421 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
422 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
425 define <32 x i32> @v32si32_cmp(<32 x i32> %x, <32 x i32> %y) nounwind readnone {
426 %cmp = icmp eq <32 x i32> %x, %y
427 %sext = sext <32 x i1> %cmp to <32 x i32>
430 ; CHECK: v32si32_cmp:
431 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
432 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
433 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
434 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
435 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
436 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
437 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
438 ; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
441 define <2 x float> @v2f32_cmp(<2 x float> %x, <2 x float> %y) nounwind readnone {
443 %cmp = fcmp oeq <2 x float> %x, %y
444 %sext = sext <2 x i1> %cmp to <2 x i32>
445 %0 = bitcast <2 x i32> %sext to <2 x float>
449 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
452 ; Adicional tests for v4f32 since it is a altivec native type
454 define <4 x float> @v4f32_cmp_eq(<4 x float> %x, <4 x float> %y) nounwind readnone {
456 %cmp = fcmp oeq <4 x float> %x, %y
457 %sext = sext <4 x i1> %cmp to <4 x i32>
458 %0 = bitcast <4 x i32> %sext to <4 x float>
461 ; CHECK: v4f32_cmp_eq:
462 ; CHECK: vcmpeqfp 2, 2, 3
464 define <4 x float> @v4f32_cmp_ne(<4 x float> %x, <4 x float> %y) nounwind readnone {
466 %cmp = fcmp une <4 x float> %x, %y
467 %sext = sext <4 x i1> %cmp to <4 x i32>
468 %0 = bitcast <4 x i32> %sext to <4 x float>
471 ; CHECK: v4f32_cmp_ne:
472 ; CHECK: vcmpeqfp [[RET:[0-9]+]], 2, 3
473 ; CHECK-NEXT: vnor 2, [[RET]], [[RET]]
475 define <4 x float> @v4f32_cmp_le(<4 x float> %x, <4 x float> %y) nounwind readnone {
477 %cmp = fcmp ole <4 x float> %x, %y
478 %sext = sext <4 x i1> %cmp to <4 x i32>
479 %0 = bitcast <4 x i32> %sext to <4 x float>
482 ; CHECK: v4f32_cmp_le:
483 ; CHECK: vcmpeqfp [[RCMPEQ:[0-9]+]], 2, 3
484 ; CHECK-NEXT: vcmpgtfp [[RCMPLE:[0-9]+]], 3, 2
485 ; CHECK-NEXT: vor 2, [[RCMPLE]], [[RCMPEQ]]
487 define <4 x float> @v4f32_cmp_lt(<4 x float> %x, <4 x float> %y) nounwind readnone {
489 %cmp = fcmp olt <4 x float> %x, %y
490 %sext = sext <4 x i1> %cmp to <4 x i32>
491 %0 = bitcast <4 x i32> %sext to <4 x float>
494 ; CHECK: v4f32_cmp_lt:
495 ; CHECK: vcmpgtfp 2, 3, 2
497 define <4 x float> @v4f32_cmp_ge(<4 x float> %x, <4 x float> %y) nounwind readnone {
499 %cmp = fcmp oge <4 x float> %x, %y
500 %sext = sext <4 x i1> %cmp to <4 x i32>
501 %0 = bitcast <4 x i32> %sext to <4 x float>
504 ; CHECK: v4f32_cmp_ge:
505 ; CHECK: vcmpgefp 2, 2, 3
507 define <4 x float> @v4f32_cmp_gt(<4 x float> %x, <4 x float> %y) nounwind readnone {
509 %cmp = fcmp ogt <4 x float> %x, %y
510 %sext = sext <4 x i1> %cmp to <4 x i32>
511 %0 = bitcast <4 x i32> %sext to <4 x float>
514 ; CHECK: v4f32_cmp_gt:
515 ; CHECK: vcmpgtfp 2, 2, 3
518 define <8 x float> @v8f32_cmp(<8 x float> %x, <8 x float> %y) nounwind readnone {
520 %cmp = fcmp oeq <8 x float> %x, %y
521 %sext = sext <8 x i1> %cmp to <8 x i32>
522 %0 = bitcast <8 x i32> %sext to <8 x float>
526 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
527 ; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}