1 ; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s | FileCheck %s
2 ; RUN: llc -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-REG %s
3 ; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s | FileCheck %s
4 ; RUN: llc -mcpu=pwr7 -mattr=+vsx -fast-isel -O0 < %s | FileCheck -check-prefix=CHECK-FISL %s
5 target datalayout = "E-m:e-i64:64-n32:64"
6 target triple = "powerpc64-unknown-linux-gnu"
8 define double @test1(double %a, double %b) {
10 %v = fmul double %a, %b
14 ; CHECK: xsmuldp 1, 1, 2
18 define double @test2(double %a, double %b) {
20 %v = fdiv double %a, %b
24 ; CHECK: xsdivdp 1, 1, 2
28 define double @test3(double %a, double %b) {
30 %v = fadd double %a, %b
34 ; CHECK: xsadddp 1, 1, 2
38 define <2 x double> @test4(<2 x double> %a, <2 x double> %b) {
40 %v = fadd <2 x double> %a, %b
44 ; CHECK: xvadddp 34, 34, 35
48 define <4 x i32> @test5(<4 x i32> %a, <4 x i32> %b) {
50 %v = xor <4 x i32> %a, %b
53 ; CHECK-REG-LABEL: @test5
54 ; CHECK-REG: xxlxor 34, 34, 35
57 ; CHECK-FISL-LABEL: @test5
58 ; CHECK-FISL: vor 4, 2, 2
59 ; CHECK-FISL: vor 5, 3, 3
60 ; CHECK-FISL: xxlxor 36, 36, 37
61 ; CHECK-FISL: vor 2, 4, 4
65 define <8 x i16> @test6(<8 x i16> %a, <8 x i16> %b) {
67 %v = xor <8 x i16> %a, %b
70 ; CHECK-REG-LABEL: @test6
71 ; CHECK-REG: xxlxor 34, 34, 35
74 ; CHECK-FISL-LABEL: @test6
75 ; CHECK-FISL: vor 4, 2, 2
76 ; CHECK-FISL: vor 5, 3, 3
77 ; CHECK-FISL: xxlxor 36, 36, 37
78 ; CHECK-FISL: vor 2, 4, 4
82 define <16 x i8> @test7(<16 x i8> %a, <16 x i8> %b) {
84 %v = xor <16 x i8> %a, %b
87 ; CHECK-REG-LABEL: @test7
88 ; CHECK-REG: xxlxor 34, 34, 35
91 ; CHECK-FISL-LABEL: @test7
92 ; CHECK-FISL: vor 4, 2, 2
93 ; CHECK-FISL: vor 5, 3, 3
94 ; CHECK-FISL: xxlxor 36, 36, 37
95 ; CHECK-FISL: vor 2, 4, 4
99 define <4 x i32> @test8(<4 x i32> %a, <4 x i32> %b) {
101 %v = or <4 x i32> %a, %b
104 ; CHECK-REG-LABEL: @test8
105 ; CHECK-REG: xxlor 34, 34, 35
108 ; CHECK-FISL-LABEL: @test8
109 ; CHECK-FISL: vor 4, 2, 2
110 ; CHECK-FISL: vor 5, 3, 3
111 ; CHECK-FISL: xxlor 36, 36, 37
112 ; CHECK-FISL: vor 2, 4, 4
116 define <8 x i16> @test9(<8 x i16> %a, <8 x i16> %b) {
118 %v = or <8 x i16> %a, %b
121 ; CHECK-REG-LABEL: @test9
122 ; CHECK-REG: xxlor 34, 34, 35
125 ; CHECK-FISL-LABEL: @test9
126 ; CHECK-FISL: vor 4, 2, 2
127 ; CHECK-FISL: vor 5, 3, 3
128 ; CHECK-FISL: xxlor 36, 36, 37
129 ; CHECK-FISL: vor 2, 4, 4
133 define <16 x i8> @test10(<16 x i8> %a, <16 x i8> %b) {
135 %v = or <16 x i8> %a, %b
138 ; CHECK-REG-LABEL: @test10
139 ; CHECK-REG: xxlor 34, 34, 35
142 ; CHECK-FISL-LABEL: @test10
143 ; CHECK-FISL: vor 4, 2, 2
144 ; CHECK-FISL: vor 5, 3, 3
145 ; CHECK-FISL: xxlor 36, 36, 37
146 ; CHECK-FISL: vor 2, 4, 4
150 define <4 x i32> @test11(<4 x i32> %a, <4 x i32> %b) {
152 %v = and <4 x i32> %a, %b
155 ; CHECK-REG-LABEL: @test11
156 ; CHECK-REG: xxland 34, 34, 35
159 ; CHECK-FISL-LABEL: @test11
160 ; CHECK-FISL: vor 4, 2, 2
161 ; CHECK-FISL: vor 5, 3, 3
162 ; CHECK-FISL: xxland 36, 36, 37
163 ; CHECK-FISL: vor 2, 4, 4
167 define <8 x i16> @test12(<8 x i16> %a, <8 x i16> %b) {
169 %v = and <8 x i16> %a, %b
172 ; CHECK-REG-LABEL: @test12
173 ; CHECK-REG: xxland 34, 34, 35
176 ; CHECK-FISL-LABEL: @test12
177 ; CHECK-FISL: vor 4, 2, 2
178 ; CHECK-FISL: vor 5, 3, 3
179 ; CHECK-FISL: xxland 36, 36, 37
180 ; CHECK-FISL: vor 2, 4, 4
184 define <16 x i8> @test13(<16 x i8> %a, <16 x i8> %b) {
186 %v = and <16 x i8> %a, %b
189 ; CHECK-REG-LABEL: @test13
190 ; CHECK-REG: xxland 34, 34, 35
193 ; CHECK-FISL-LABEL: @test13
194 ; CHECK-FISL: vor 4, 2, 2
195 ; CHECK-FISL: vor 5, 3, 3
196 ; CHECK-FISL: xxland 36, 36, 37
197 ; CHECK-FISL: vor 2, 4, 4
201 define <4 x i32> @test14(<4 x i32> %a, <4 x i32> %b) {
203 %v = or <4 x i32> %a, %b
204 %w = xor <4 x i32> %v, <i32 -1, i32 -1, i32 -1, i32 -1>
207 ; CHECK-REG-LABEL: @test14
208 ; CHECK-REG: xxlnor 34, 34, 35
211 ; CHECK-FISL-LABEL: @test14
212 ; CHECK-FISL: vor 4, 2, 2
213 ; CHECK-FISL: vor 5, 3, 3
214 ; CHECK-FISL: xxlor 36, 36, 37
215 ; CHECK-FISL: vor 0, 4, 4
216 ; CHECK-FISL: vor 4, 2, 2
217 ; CHECK-FISL: vor 5, 3, 3
218 ; CHECK-FISL: xxlnor 36, 36, 37
219 ; CHECK-FISL: vor 2, 4, 4
220 ; CHECK-FISL: lis 0, -1
221 ; CHECK-FISL: ori 0, 0, 65520
222 ; CHECK-FISL: stvx 0, 1, 0
226 define <8 x i16> @test15(<8 x i16> %a, <8 x i16> %b) {
228 %v = or <8 x i16> %a, %b
229 %w = xor <8 x i16> %v, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
232 ; CHECK-REG-LABEL: @test15
233 ; CHECK-REG: xxlnor 34, 34, 35
236 ; CHECK-FISL-LABEL: @test15
237 ; CHECK-FISL: vor 4, 2, 2
238 ; CHECK-FISL: vor 5, 3, 3
239 ; CHECK-FISL: xxlor 36, 36, 37
240 ; CHECK-FISL: vor 0, 4, 4
241 ; CHECK-FISL: vor 4, 2, 2
242 ; CHECK-FISL: vor 5, 3, 3
243 ; CHECK-FISL: xxlnor 36, 36, 37
244 ; CHECK-FISL: vor 2, 4, 4
245 ; CHECK-FISL: lis 0, -1
246 ; CHECK-FISL: ori 0, 0, 65520
247 ; CHECK-FISL: stvx 0, 1, 0
251 define <16 x i8> @test16(<16 x i8> %a, <16 x i8> %b) {
253 %v = or <16 x i8> %a, %b
254 %w = xor <16 x i8> %v, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
257 ; CHECK-REG-LABEL: @test16
258 ; CHECK-REG: xxlnor 34, 34, 35
261 ; CHECK-FISL-LABEL: @test16
262 ; CHECK-FISL: vor 4, 2, 2
263 ; CHECK-FISL: vor 5, 3, 3
264 ; CHECK-FISL: xxlor 36, 36, 37
265 ; CHECK-FISL: vor 0, 4, 4
266 ; CHECK-FISL: vor 4, 2, 2
267 ; CHECK-FISL: vor 5, 3, 3
268 ; CHECK-FISL: xxlnor 36, 36, 37
269 ; CHECK-FISL: vor 2, 4, 4
270 ; CHECK-FISL: lis 0, -1
271 ; CHECK-FISL: ori 0, 0, 65520
272 ; CHECK-FISL: stvx 0, 1, 0
276 define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
278 %w = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
279 %v = and <4 x i32> %a, %w
282 ; CHECK-REG-LABEL: @test17
283 ; CHECK-REG: xxlandc 34, 34, 35
286 ; CHECK-FISL-LABEL: @test17
287 ; CHECK-FISL: vspltisb 4, -1
288 ; CHECK-FISL: vor 5, 3, 3
289 ; CHECK-FISL: vor 0, 4, 4
290 ; CHECK-FISL: xxlxor 37, 37, 32
291 ; CHECK-FISL: vor 3, 5, 5
292 ; CHECK-FISL: vor 5, 2, 2
293 ; CHECK-FISL: vor 0, 3, 3
294 ; CHECK-FISL: xxland 37, 37, 32
295 ; CHECK-FISL: vor 2, 5, 5
299 define <8 x i16> @test18(<8 x i16> %a, <8 x i16> %b) {
301 %w = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
302 %v = and <8 x i16> %a, %w
305 ; CHECK-REG-LABEL: @test18
306 ; CHECK-REG: xxlandc 34, 34, 35
309 ; CHECK-FISL-LABEL: @test18
310 ; CHECK-FISL: vspltisb 4, -1
311 ; CHECK-FISL: vor 5, 3, 3
312 ; CHECK-FISL: vor 0, 4, 4
313 ; CHECK-FISL: xxlxor 37, 37, 32
314 ; CHECK-FISL: vor 4, 5, 5
315 ; CHECK-FISL: vor 5, 2, 2
316 ; CHECK-FISL: vor 0, 3, 3
317 ; CHECK-FISL: xxlandc 37, 37, 32
318 ; CHECK-FISL: vor 2, 5, 5
319 ; CHECK-FISL: lis 0, -1
320 ; CHECK-FISL: ori 0, 0, 65520
321 ; CHECK-FISL: stvx 4, 1, 0
325 define <16 x i8> @test19(<16 x i8> %a, <16 x i8> %b) {
327 %w = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
328 %v = and <16 x i8> %a, %w
331 ; CHECK-REG-LABEL: @test19
332 ; CHECK-REG: xxlandc 34, 34, 35
335 ; CHECK-FISL-LABEL: @test19
336 ; CHECK-FISL: vspltisb 4, -1
337 ; CHECK-FISL: vor 5, 3, 3
338 ; CHECK-FISL: vor 0, 4, 4
339 ; CHECK-FISL: xxlxor 37, 37, 32
340 ; CHECK-FISL: vor 4, 5, 5
341 ; CHECK-FISL: vor 5, 2, 2
342 ; CHECK-FISL: vor 0, 3, 3
343 ; CHECK-FISL: xxlandc 37, 37, 32
344 ; CHECK-FISL: vor 2, 5, 5
345 ; CHECK-FISL: lis 0, -1
346 ; CHECK-FISL: ori 0, 0, 65520
347 ; CHECK-FISL: stvx 4, 1, 0
351 define <4 x i32> @test20(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
353 %m = icmp eq <4 x i32> %c, %d
354 %v = select <4 x i1> %m, <4 x i32> %a, <4 x i32> %b
357 ; CHECK-REG-LABEL: @test20
358 ; CHECK-REG: vcmpequw {{[0-9]+}}, 4, 5
359 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
362 ; CHECK-FISL-LABEL: @test20
363 ; CHECK-FISL: vcmpequw 4, 4, 5
364 ; CHECK-FISL: vor 0, 3, 3
365 ; CHECK-FISL: vor 1, 2, 2
366 ; CHECK-FISL: vor 6, 4, 4
367 ; CHECK-FISL: xxsel 32, 32, 33, 38
368 ; CHECK-FISL: vor 2, 0, 0
372 define <4 x float> @test21(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
374 %m = fcmp oeq <4 x float> %c, %d
375 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b
378 ; CHECK-REG-LABEL: @test21
379 ; CHECK-REG: xvcmpeqsp [[V1:[0-9]+]], 36, 37
380 ; CHECK-REG: xxsel 34, 35, 34, [[V1]]
383 ; CHECK-FISL-LABEL: @test21
384 ; CHECK-FISL: vor 0, 5, 5
385 ; CHECK-FISL: vor 1, 4, 4
386 ; CHECK-FISL: vor 6, 3, 3
387 ; CHECK-FISL: vor 7, 2, 2
388 ; CHECK-FISL: xvcmpeqsp 32, 33, 32
389 ; CHECK-FISL: xxsel 32, 38, 39, 32
390 ; CHECK-FISL: vor 2, 0, 0
394 define <4 x float> @test22(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
396 %m = fcmp ueq <4 x float> %c, %d
397 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b
400 ; CHECK-REG-LABEL: @test22
401 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 37, 37
402 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 36, 36
403 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 36, 37
404 ; CHECK-REG-DAG: xxlnor
405 ; CHECK-REG-DAG: xxlnor
406 ; CHECK-REG-DAG: xxlor
407 ; CHECK-REG-DAG: xxlor
408 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
411 ; CHECK-FISL-LABEL: @test22
412 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 33, 32
413 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 32, 32
414 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 33, 33
415 ; CHECK-FISL-DAG: xxlnor
416 ; CHECK-FISL-DAG: xxlnor
417 ; CHECK-FISL-DAG: xxlor
418 ; CHECK-FISL-DAG: xxlor
419 ; CHECK-FISL: xxsel 0, 38, 39, {{[0-9]+}}
423 define <8 x i16> @test23(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, <8 x i16> %d) {
425 %m = icmp eq <8 x i16> %c, %d
426 %v = select <8 x i1> %m, <8 x i16> %a, <8 x i16> %b
429 ; CHECK-REG-LABEL: @test23
430 ; CHECK-REG: vcmpequh {{[0-9]+}}, 4, 5
431 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
434 ; CHECK-FISL-LABEL: @test23
435 ; CHECK-FISL: vcmpequh 4, 4, 5
436 ; CHECK-FISL: vor 0, 3, 3
437 ; CHECK-FISL: vor 1, 2, 2
438 ; CHECK-FISL: vor 6, 4, 4
439 ; CHECK-FISL: xxsel 32, 32, 33, 38
440 ; CHECK-FISL: vor 2, 0,
444 define <16 x i8> @test24(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
446 %m = icmp eq <16 x i8> %c, %d
447 %v = select <16 x i1> %m, <16 x i8> %a, <16 x i8> %b
450 ; CHECK-REG-LABEL: @test24
451 ; CHECK-REG: vcmpequb {{[0-9]+}}, 4, 5
452 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
455 ; CHECK-FISL-LABEL: @test24
456 ; CHECK-FISL: vcmpequb 4, 4, 5
457 ; CHECK-FISL: vor 0, 3, 3
458 ; CHECK-FISL: vor 1, 2, 2
459 ; CHECK-FISL: vor 6, 4, 4
460 ; CHECK-FISL: xxsel 32, 32, 33, 38
461 ; CHECK-FISL: vor 2, 0, 0
465 define <2 x double> @test25(<2 x double> %a, <2 x double> %b, <2 x double> %c, <2 x double> %d) {
467 %m = fcmp oeq <2 x double> %c, %d
468 %v = select <2 x i1> %m, <2 x double> %a, <2 x double> %b
471 ; CHECK-LABEL: @test25
472 ; CHECK: xvcmpeqdp [[V1:[0-9]+]], 36, 37
473 ; CHECK: xxsel 34, 35, 34, [[V1]]
477 define <2 x i64> @test26(<2 x i64> %a, <2 x i64> %b) {
478 %v = add <2 x i64> %a, %b
481 ; CHECK-LABEL: @test26
483 ; Make sure we use only two stores (one for each operand).
488 ; FIXME: The code quality here is not good; just make sure we do something for now.
494 define <2 x i64> @test27(<2 x i64> %a, <2 x i64> %b) {
495 %v = and <2 x i64> %a, %b
498 ; CHECK-LABEL: @test27
499 ; CHECK: xxland 34, 34, 35
503 define <2 x double> @test28(<2 x double>* %a) {
504 %v = load <2 x double>, <2 x double>* %a, align 16
507 ; CHECK-LABEL: @test28
508 ; CHECK: lxvd2x 34, 0, 3
512 define void @test29(<2 x double>* %a, <2 x double> %b) {
513 store <2 x double> %b, <2 x double>* %a, align 16
516 ; CHECK-LABEL: @test29
517 ; CHECK: stxvd2x 34, 0, 3
521 define <2 x double> @test28u(<2 x double>* %a) {
522 %v = load <2 x double>, <2 x double>* %a, align 8
525 ; CHECK-LABEL: @test28u
526 ; CHECK: lxvd2x 34, 0, 3
530 define void @test29u(<2 x double>* %a, <2 x double> %b) {
531 store <2 x double> %b, <2 x double>* %a, align 8
534 ; CHECK-LABEL: @test29u
535 ; CHECK: stxvd2x 34, 0, 3
539 define <2 x i64> @test30(<2 x i64>* %a) {
540 %v = load <2 x i64>, <2 x i64>* %a, align 16
543 ; CHECK-REG-LABEL: @test30
544 ; CHECK-REG: lxvd2x 34, 0, 3
547 ; CHECK-FISL-LABEL: @test30
548 ; CHECK-FISL: lxvd2x 0, 0, 3
549 ; CHECK-FISL: xxlor 34, 0, 0
550 ; CHECK-FISL: vor 3, 2, 2
551 ; CHECK-FISL: vor 2, 3, 3
555 define void @test31(<2 x i64>* %a, <2 x i64> %b) {
556 store <2 x i64> %b, <2 x i64>* %a, align 16
559 ; CHECK-LABEL: @test31
560 ; CHECK: stxvd2x 34, 0, 3
564 define <4 x float> @test32(<4 x float>* %a) {
565 %v = load <4 x float>, <4 x float>* %a, align 16
568 ; CHECK-REG-LABEL: @test32
569 ; CHECK-REG: lxvw4x 34, 0, 3
572 ; CHECK-FISL-LABEL: @test32
573 ; CHECK-FISL: lxvw4x 0, 0, 3
574 ; CHECK-FISL: xxlor 34, 0, 0
578 define void @test33(<4 x float>* %a, <4 x float> %b) {
579 store <4 x float> %b, <4 x float>* %a, align 16
582 ; CHECK-REG-LABEL: @test33
583 ; CHECK-REG: stxvw4x 34, 0, 3
586 ; CHECK-FISL-LABEL: @test33
587 ; CHECK-FISL: vor 3, 2, 2
588 ; CHECK-FISL: stxvw4x 35, 0, 3
592 define <4 x float> @test32u(<4 x float>* %a) {
593 %v = load <4 x float>, <4 x float>* %a, align 8
596 ; CHECK-LABEL: @test32u
604 define void @test33u(<4 x float>* %a, <4 x float> %b) {
605 store <4 x float> %b, <4 x float>* %a, align 8
608 ; CHECK-REG-LABEL: @test33u
609 ; CHECK-REG: stxvw4x 34, 0, 3
612 ; CHECK-FISL-LABEL: @test33u
613 ; CHECK-FISL: vor 3, 2, 2
614 ; CHECK-FISL: stxvw4x 35, 0, 3
618 define <4 x i32> @test34(<4 x i32>* %a) {
619 %v = load <4 x i32>, <4 x i32>* %a, align 16
622 ; CHECK-REG-LABEL: @test34
623 ; CHECK-REG: lxvw4x 34, 0, 3
626 ; CHECK-FISL-LABEL: @test34
627 ; CHECK-FISL: lxvw4x 0, 0, 3
628 ; CHECK-FISL: xxlor 34, 0, 0
629 ; CHECK-FISL: vor 3, 2, 2
630 ; CHECK-FISL: vor 2, 3, 3
634 define void @test35(<4 x i32>* %a, <4 x i32> %b) {
635 store <4 x i32> %b, <4 x i32>* %a, align 16
638 ; CHECK-REG-LABEL: @test35
639 ; CHECK-REG: stxvw4x 34, 0, 3
642 ; CHECK-FISL-LABEL: @test35
643 ; CHECK-FISL: vor 3, 2, 2
644 ; CHECK-FISL: stxvw4x 35, 0, 3
648 define <2 x double> @test40(<2 x i64> %a) {
649 %v = uitofp <2 x i64> %a to <2 x double>
652 ; CHECK-LABEL: @test40
653 ; CHECK: xvcvuxddp 34, 34
657 define <2 x double> @test41(<2 x i64> %a) {
658 %v = sitofp <2 x i64> %a to <2 x double>
661 ; CHECK-LABEL: @test41
662 ; CHECK: xvcvsxddp 34, 34
666 define <2 x i64> @test42(<2 x double> %a) {
667 %v = fptoui <2 x double> %a to <2 x i64>
670 ; CHECK-LABEL: @test42
671 ; CHECK: xvcvdpuxds 34, 34
675 define <2 x i64> @test43(<2 x double> %a) {
676 %v = fptosi <2 x double> %a to <2 x i64>
679 ; CHECK-LABEL: @test43
680 ; CHECK: xvcvdpsxds 34, 34
684 define <2 x float> @test44(<2 x i64> %a) {
685 %v = uitofp <2 x i64> %a to <2 x float>
688 ; CHECK-LABEL: @test44
689 ; FIXME: The code quality here looks pretty bad.
693 define <2 x float> @test45(<2 x i64> %a) {
694 %v = sitofp <2 x i64> %a to <2 x float>
697 ; CHECK-LABEL: @test45
698 ; FIXME: The code quality here looks pretty bad.
702 define <2 x i64> @test46(<2 x float> %a) {
703 %v = fptoui <2 x float> %a to <2 x i64>
706 ; CHECK-LABEL: @test46
707 ; FIXME: The code quality here looks pretty bad.
711 define <2 x i64> @test47(<2 x float> %a) {
712 %v = fptosi <2 x float> %a to <2 x i64>
715 ; CHECK-LABEL: @test47
716 ; FIXME: The code quality here looks pretty bad.
720 define <2 x double> @test50(double* %a) {
721 %v = load double, double* %a, align 8
722 %w = insertelement <2 x double> undef, double %v, i32 0
723 %x = insertelement <2 x double> %w, double %v, i32 1
726 ; CHECK-LABEL: @test50
727 ; CHECK: lxvdsx 34, 0, 3
731 define <2 x double> @test51(<2 x double> %a, <2 x double> %b) {
732 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
735 ; CHECK-LABEL: @test51
736 ; CHECK: xxpermdi 34, 34, 34, 0
740 define <2 x double> @test52(<2 x double> %a, <2 x double> %b) {
741 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
744 ; CHECK-LABEL: @test52
745 ; CHECK: xxpermdi 34, 34, 35, 0
749 define <2 x double> @test53(<2 x double> %a, <2 x double> %b) {
750 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 0>
753 ; CHECK-LABEL: @test53
754 ; CHECK: xxpermdi 34, 35, 34, 0
758 define <2 x double> @test54(<2 x double> %a, <2 x double> %b) {
759 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2>
762 ; CHECK-LABEL: @test54
763 ; CHECK: xxpermdi 34, 34, 35, 2
767 define <2 x double> @test55(<2 x double> %a, <2 x double> %b) {
768 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
771 ; CHECK-LABEL: @test55
772 ; CHECK: xxpermdi 34, 34, 35, 3
776 define <2 x i64> @test56(<2 x i64> %a, <2 x i64> %b) {
777 %v = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
780 ; CHECK-LABEL: @test56
781 ; CHECK: xxpermdi 34, 34, 35, 3
785 define <2 x i64> @test60(<2 x i64> %a, <2 x i64> %b) {
786 %v = shl <2 x i64> %a, %b
789 ; CHECK-LABEL: @test60
790 ; This should scalarize, and the current code quality is not good.
799 define <2 x i64> @test61(<2 x i64> %a, <2 x i64> %b) {
800 %v = lshr <2 x i64> %a, %b
803 ; CHECK-LABEL: @test61
804 ; This should scalarize, and the current code quality is not good.
813 define <2 x i64> @test62(<2 x i64> %a, <2 x i64> %b) {
814 %v = ashr <2 x i64> %a, %b
817 ; CHECK-LABEL: @test62
818 ; This should scalarize, and the current code quality is not good.
827 define double @test63(<2 x double> %a) {
828 %v = extractelement <2 x double> %a, i32 0
831 ; CHECK-REG-LABEL: @test63
832 ; CHECK-REG: xxlor 1, 34, 34
835 ; CHECK-FISL-LABEL: @test63
836 ; CHECK-FISL: xxlor 0, 34, 34
837 ; CHECK-FISL: fmr 1, 0
841 define double @test64(<2 x double> %a) {
842 %v = extractelement <2 x double> %a, i32 1
845 ; CHECK-REG-LABEL: @test64
846 ; CHECK-REG: xxpermdi 1, 34, 34, 2
849 ; CHECK-FISL-LABEL: @test64
850 ; CHECK-FISL: xxpermdi 34, 34, 34, 2
851 ; CHECK-FISL: xxlor 0, 34, 34
852 ; CHECK-FISL: fmr 1, 0
856 define <2 x i1> @test65(<2 x i64> %a, <2 x i64> %b) {
857 %w = icmp eq <2 x i64> %a, %b
860 ; CHECK-REG-LABEL: @test65
861 ; CHECK-REG: vcmpequw 2, 2, 3
864 ; CHECK-FISL-LABEL: @test65
865 ; CHECK-FISL: vor 4, 3, 3
866 ; CHECK-FISL: vor 5, 2, 2
867 ; CHECK-FISL: vcmpequw 4, 5, 4
868 ; CHECK-FISL: vor 2, 4, 4
872 define <2 x i1> @test66(<2 x i64> %a, <2 x i64> %b) {
873 %w = icmp ne <2 x i64> %a, %b
876 ; CHECK-REG-LABEL: @test66
877 ; CHECK-REG: vcmpequw {{[0-9]+}}, 2, 3
878 ; CHECK-REG: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
881 ; CHECK-FISL-LABEL: @test66
882 ; CHECK-FISL: vcmpequw {{[0-9]+}}, 5, 4
883 ; CHECK-FISL: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
887 define <2 x i1> @test67(<2 x i64> %a, <2 x i64> %b) {
888 %w = icmp ult <2 x i64> %a, %b
891 ; CHECK-LABEL: @test67
892 ; This should scalarize, and the current code quality is not good.
901 define <2 x double> @test68(<2 x i32> %a) {
902 %w = sitofp <2 x i32> %a to <2 x double>
905 ; CHECK-LABEL: @test68
906 ; CHECK: xxsldwi [[V1:[0-9]+]], 34, 34, 1
907 ; CHECK: xvcvsxwdp 34, [[V1]]
911 define <2 x double> @test69(<2 x i16> %a) {
912 %w = sitofp <2 x i16> %a to <2 x double>
915 ; CHECK-LABEL: @test69
916 ; CHECK: vspltisw [[V1:[0-9]+]], 8
917 ; CHECK: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
918 ; CHECK: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
919 ; CHECK: vsraw {{[0-9]+}}, [[V3]], [[V2]]
920 ; CHECK: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
921 ; CHECK: xvcvsxwdp 34, [[V4]]
925 define <2 x double> @test70(<2 x i8> %a) {
926 %w = sitofp <2 x i8> %a to <2 x double>
929 ; CHECK-LABEL: @test70
930 ; CHECK: vspltisw [[V1:[0-9]+]], 12
931 ; CHECK: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
932 ; CHECK: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
933 ; CHECK: vsraw {{[0-9]+}}, [[V3]], [[V2]]
934 ; CHECK: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
935 ; CHECK: xvcvsxwdp 34, [[V4]]
939 define <2 x i32> @test80(i32 %v) {
940 %b1 = insertelement <2 x i32> undef, i32 %v, i32 0
941 %b2 = shufflevector <2 x i32> %b1, <2 x i32> undef, <2 x i32> zeroinitializer
942 %i = add <2 x i32> %b2, <i32 2, i32 3>
945 ; CHECK-REG-LABEL: @test80
946 ; CHECK-REG-DAG: addi [[R1:[0-9]+]], 3, 3
947 ; CHECK-REG-DAG: addi [[R2:[0-9]+]], 1, -16
948 ; CHECK-REG-DAG: addi [[R3:[0-9]+]], 3, 2
949 ; CHECK-REG: std [[R1]], -8(1)
950 ; CHECK-REG: std [[R3]], -16(1)
951 ; CHECK-REG: lxvd2x 34, 0, [[R2]]
952 ; CHECK-REG-NOT: stxvd2x
955 ; CHECK-FISL-LABEL: @test80
956 ; CHECK-FISL-DAG: addi [[R1:[0-9]+]], 3, 3
957 ; CHECK-FISL-DAG: addi [[R2:[0-9]+]], 1, -16
958 ; CHECK-FISL-DAG: addi [[R3:[0-9]+]], 3, 2
959 ; CHECK-FISL-DAG: std [[R1]], -8(1)
960 ; CHECK-FISL-DAG: std [[R3]], -16(1)
961 ; CHECK-FISL-DAG: lxvd2x 0, 0, [[R2]]
965 define <2 x double> @test81(<4 x float> %b) {
966 %w = bitcast <4 x float> %b to <2 x double>
969 ; CHECK-LABEL: @test81
973 define double @test82(double %a, double %b, double %c, double %d) {
975 %m = fcmp oeq double %c, %d
976 %v = select i1 %m, double %a, double %b
979 ; CHECK-REG-LABEL: @test82
980 ; CHECK-REG: xscmpudp [[REG:[0-9]+]], 3, 4
981 ; CHECK-REG: beqlr [[REG]]
983 ; CHECK-FISL-LABEL: @test82
984 ; CHECK-FISL: xscmpudp [[REG:[0-9]+]], 3, 4
985 ; CHECK-FISL: beq [[REG]], {{.*}}