1 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s
2 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-REG %s
3 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx -fast-isel -O0 < %s | FileCheck %s
4 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx -fast-isel -O0 < %s | FileCheck -check-prefix=CHECK-FISL %s
5 ; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-LE %s
7 define double @test1(double %a, double %b) {
9 %v = fmul double %a, %b
13 ; CHECK: xsmuldp 1, 1, 2
16 ; CHECK-LE-LABEL: @test1
17 ; CHECK-LE: xsmuldp 1, 1, 2
21 define double @test2(double %a, double %b) {
23 %v = fdiv double %a, %b
27 ; CHECK: xsdivdp 1, 1, 2
30 ; CHECK-LE-LABEL: @test2
31 ; CHECK-LE: xsdivdp 1, 1, 2
35 define double @test3(double %a, double %b) {
37 %v = fadd double %a, %b
41 ; CHECK: xsadddp 1, 1, 2
44 ; CHECK-LE-LABEL: @test3
45 ; CHECK-LE: xsadddp 1, 1, 2
49 define <2 x double> @test4(<2 x double> %a, <2 x double> %b) {
51 %v = fadd <2 x double> %a, %b
55 ; CHECK: xvadddp 34, 34, 35
58 ; CHECK-LE-LABEL: @test4
59 ; CHECK-LE: xvadddp 34, 34, 35
63 define <4 x i32> @test5(<4 x i32> %a, <4 x i32> %b) {
65 %v = xor <4 x i32> %a, %b
68 ; CHECK-REG-LABEL: @test5
69 ; CHECK-REG: xxlxor 34, 34, 35
72 ; CHECK-FISL-LABEL: @test5
79 ; CHECK-LE-LABEL: @test5
80 ; CHECK-LE: xxlxor 34, 34, 35
84 define <8 x i16> @test6(<8 x i16> %a, <8 x i16> %b) {
86 %v = xor <8 x i16> %a, %b
89 ; CHECK-REG-LABEL: @test6
90 ; CHECK-REG: xxlxor 34, 34, 35
93 ; CHECK-FISL-LABEL: @test6
94 ; CHECK-FISL: vor 4, 2, 2
95 ; CHECK-FISL: vor 5, 3, 3
96 ; CHECK-FISL: xxlxor 36, 36, 37
97 ; CHECK-FISL: vor 2, 4, 4
100 ; CHECK-LE-LABEL: @test6
101 ; CHECK-LE: xxlxor 34, 34, 35
105 define <16 x i8> @test7(<16 x i8> %a, <16 x i8> %b) {
107 %v = xor <16 x i8> %a, %b
110 ; CHECK-REG-LABEL: @test7
111 ; CHECK-REG: xxlxor 34, 34, 35
114 ; CHECK-FISL-LABEL: @test7
115 ; CHECK-FISL: vor 4, 2, 2
116 ; CHECK-FISL: vor 5, 3, 3
117 ; CHECK-FISL: xxlxor 36, 36, 37
118 ; CHECK-FISL: vor 2, 4, 4
121 ; CHECK-LE-LABEL: @test7
122 ; CHECK-LE: xxlxor 34, 34, 35
126 define <4 x i32> @test8(<4 x i32> %a, <4 x i32> %b) {
128 %v = or <4 x i32> %a, %b
131 ; CHECK-REG-LABEL: @test8
132 ; CHECK-REG: xxlor 34, 34, 35
135 ; CHECK-FISL-LABEL: @test8
142 ; CHECK-LE-LABEL: @test8
143 ; CHECK-LE: xxlor 34, 34, 35
147 define <8 x i16> @test9(<8 x i16> %a, <8 x i16> %b) {
149 %v = or <8 x i16> %a, %b
152 ; CHECK-REG-LABEL: @test9
153 ; CHECK-REG: xxlor 34, 34, 35
156 ; CHECK-FISL-LABEL: @test9
157 ; CHECK-FISL: vor 4, 2, 2
158 ; CHECK-FISL: vor 5, 3, 3
159 ; CHECK-FISL: xxlor 36, 36, 37
160 ; CHECK-FISL: vor 2, 4, 4
163 ; CHECK-LE-LABEL: @test9
164 ; CHECK-LE: xxlor 34, 34, 35
168 define <16 x i8> @test10(<16 x i8> %a, <16 x i8> %b) {
170 %v = or <16 x i8> %a, %b
173 ; CHECK-REG-LABEL: @test10
174 ; CHECK-REG: xxlor 34, 34, 35
177 ; CHECK-FISL-LABEL: @test10
178 ; CHECK-FISL: vor 4, 2, 2
179 ; CHECK-FISL: vor 5, 3, 3
180 ; CHECK-FISL: xxlor 36, 36, 37
181 ; CHECK-FISL: vor 2, 4, 4
184 ; CHECK-LE-LABEL: @test10
185 ; CHECK-LE: xxlor 34, 34, 35
189 define <4 x i32> @test11(<4 x i32> %a, <4 x i32> %b) {
191 %v = and <4 x i32> %a, %b
194 ; CHECK-REG-LABEL: @test11
195 ; CHECK-REG: xxland 34, 34, 35
198 ; CHECK-FISL-LABEL: @test11
205 ; CHECK-LE-LABEL: @test11
206 ; CHECK-LE: xxland 34, 34, 35
210 define <8 x i16> @test12(<8 x i16> %a, <8 x i16> %b) {
212 %v = and <8 x i16> %a, %b
215 ; CHECK-REG-LABEL: @test12
216 ; CHECK-REG: xxland 34, 34, 35
219 ; CHECK-FISL-LABEL: @test12
220 ; CHECK-FISL: vor 4, 2, 2
221 ; CHECK-FISL: vor 5, 3, 3
222 ; CHECK-FISL: xxland 36, 36, 37
223 ; CHECK-FISL: vor 2, 4, 4
226 ; CHECK-LE-LABEL: @test12
227 ; CHECK-LE: xxland 34, 34, 35
231 define <16 x i8> @test13(<16 x i8> %a, <16 x i8> %b) {
233 %v = and <16 x i8> %a, %b
236 ; CHECK-REG-LABEL: @test13
237 ; CHECK-REG: xxland 34, 34, 35
240 ; CHECK-FISL-LABEL: @test13
241 ; CHECK-FISL: vor 4, 2, 2
242 ; CHECK-FISL: vor 5, 3, 3
243 ; CHECK-FISL: xxland 36, 36, 37
244 ; CHECK-FISL: vor 2, 4, 4
247 ; CHECK-LE-LABEL: @test13
248 ; CHECK-LE: xxland 34, 34, 35
252 define <4 x i32> @test14(<4 x i32> %a, <4 x i32> %b) {
254 %v = or <4 x i32> %a, %b
255 %w = xor <4 x i32> %v, <i32 -1, i32 -1, i32 -1, i32 -1>
258 ; CHECK-REG-LABEL: @test14
259 ; CHECK-REG: xxlnor 34, 34, 35
262 ; CHECK-FISL-LABEL: @test14
263 ; CHECK-FISL: vor 4, 3, 3
264 ; CHECK-FISL: vor 5, 2, 2
265 ; CHECK-FISL: xxlor 0, 37, 36
266 ; CHECK-FISL: xxlnor 36, 37, 36
267 ; CHECK-FISL: vor 2, 4, 4
268 ; CHECK-FISL: lis 0, -1
269 ; CHECK-FISL: ori 0, 0, 65520
270 ; CHECK-FISL: stxvd2x 0, 1, 0
273 ; CHECK-LE-LABEL: @test14
274 ; CHECK-LE: xxlnor 34, 34, 35
278 define <8 x i16> @test15(<8 x i16> %a, <8 x i16> %b) {
280 %v = or <8 x i16> %a, %b
281 %w = xor <8 x i16> %v, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
284 ; CHECK-REG-LABEL: @test15
285 ; CHECK-REG: xxlnor 34, 34, 35
288 ; CHECK-FISL-LABEL: @test15
289 ; CHECK-FISL: vor 4, 2, 2
290 ; CHECK-FISL: vor 5, 3, 3
291 ; CHECK-FISL: xxlor 36, 36, 37
292 ; CHECK-FISL: vor 0, 4, 4
293 ; CHECK-FISL: vor 4, 2, 2
294 ; CHECK-FISL: vor 5, 3, 3
295 ; CHECK-FISL: xxlnor 36, 36, 37
296 ; CHECK-FISL: vor 2, 4, 4
297 ; CHECK-FISL: lis 0, -1
298 ; CHECK-FISL: ori 0, 0, 65520
299 ; CHECK-FISL: stvx 0, 1, 0
302 ; CHECK-LE-LABEL: @test15
303 ; CHECK-LE: xxlnor 34, 34, 35
307 define <16 x i8> @test16(<16 x i8> %a, <16 x i8> %b) {
309 %v = or <16 x i8> %a, %b
310 %w = xor <16 x i8> %v, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
313 ; CHECK-REG-LABEL: @test16
314 ; CHECK-REG: xxlnor 34, 34, 35
317 ; CHECK-FISL-LABEL: @test16
318 ; CHECK-FISL: vor 4, 2, 2
319 ; CHECK-FISL: vor 5, 3, 3
320 ; CHECK-FISL: xxlor 36, 36, 37
321 ; CHECK-FISL: vor 0, 4, 4
322 ; CHECK-FISL: vor 4, 2, 2
323 ; CHECK-FISL: vor 5, 3, 3
324 ; CHECK-FISL: xxlnor 36, 36, 37
325 ; CHECK-FISL: vor 2, 4, 4
326 ; CHECK-FISL: lis 0, -1
327 ; CHECK-FISL: ori 0, 0, 65520
328 ; CHECK-FISL: stvx 0, 1, 0
331 ; CHECK-LE-LABEL: @test16
332 ; CHECK-LE: xxlnor 34, 34, 35
336 define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
338 %w = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
339 %v = and <4 x i32> %a, %w
342 ; CHECK-REG-LABEL: @test17
343 ; CHECK-REG: xxlandc 34, 34, 35
346 ; CHECK-FISL-LABEL: @test17
347 ; CHECK-FISL: vor 4, 3, 3
348 ; CHECK-FISL: vor 5, 2, 2
349 ; CHECK-FISL: vspltisb 2, -1
350 ; CHECK-FISL: vor 0, 2, 2
351 ; CHECK-FISL: xxlxor 36, 36, 32
352 ; CHECK-FISL: xxland 36, 37, 36
353 ; CHECK-FISL: vor 2, 4, 4
356 ; CHECK-LE-LABEL: @test17
357 ; CHECK-LE: xxlandc 34, 34, 35
361 define <8 x i16> @test18(<8 x i16> %a, <8 x i16> %b) {
363 %w = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
364 %v = and <8 x i16> %a, %w
367 ; CHECK-REG-LABEL: @test18
368 ; CHECK-REG: xxlandc 34, 34, 35
371 ; CHECK-FISL-LABEL: @test18
372 ; CHECK-FISL: vspltisb 4, -1
373 ; CHECK-FISL: vor 5, 3, 3
374 ; CHECK-FISL: vor 0, 4, 4
375 ; CHECK-FISL: xxlxor 37, 37, 32
376 ; CHECK-FISL: vor 4, 5, 5
377 ; CHECK-FISL: vor 5, 2, 2
378 ; CHECK-FISL: vor 0, 3, 3
379 ; CHECK-FISL: xxlandc 37, 37, 32
380 ; CHECK-FISL: vor 2, 5, 5
381 ; CHECK-FISL: lis 0, -1
382 ; CHECK-FISL: ori 0, 0, 65520
383 ; CHECK-FISL: stvx 4, 1, 0
386 ; CHECK-LE-LABEL: @test18
387 ; CHECK-LE: xxlandc 34, 34, 35
391 define <16 x i8> @test19(<16 x i8> %a, <16 x i8> %b) {
393 %w = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
394 %v = and <16 x i8> %a, %w
397 ; CHECK-REG-LABEL: @test19
398 ; CHECK-REG: xxlandc 34, 34, 35
401 ; CHECK-FISL-LABEL: @test19
402 ; CHECK-FISL: vspltisb 4, -1
403 ; CHECK-FISL: vor 5, 3, 3
404 ; CHECK-FISL: vor 0, 4, 4
405 ; CHECK-FISL: xxlxor 37, 37, 32
406 ; CHECK-FISL: vor 4, 5, 5
407 ; CHECK-FISL: vor 5, 2, 2
408 ; CHECK-FISL: vor 0, 3, 3
409 ; CHECK-FISL: xxlandc 37, 37, 32
410 ; CHECK-FISL: vor 2, 5, 5
411 ; CHECK-FISL: lis 0, -1
412 ; CHECK-FISL: ori 0, 0, 65520
413 ; CHECK-FISL: stvx 4, 1, 0
416 ; CHECK-LE-LABEL: @test19
417 ; CHECK-LE: xxlandc 34, 34, 35
421 define <4 x i32> @test20(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
423 %m = icmp eq <4 x i32> %c, %d
424 %v = select <4 x i1> %m, <4 x i32> %a, <4 x i32> %b
427 ; CHECK-REG-LABEL: @test20
428 ; CHECK-REG: vcmpequw {{[0-9]+}}, 4, 5
429 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
432 ; FIXME: The fast-isel code is pretty miserable for this one.
434 ; CHECK-FISL-LABEL: @test20
435 ; CHECK-FISL: vor 0, 5, 5
436 ; CHECK-FISL: vor 1, 4, 4
437 ; CHECK-FISL: vor 6, 3, 3
438 ; CHECK-FISL: vor 7, 2, 2
439 ; CHECK-FISL: vor 2, 1, 1
440 ; CHECK-FISL: vor 3, 0, 0
441 ; CHECK-FISL: vcmpequw 2, 2, 3
442 ; CHECK-FISL: vor 0, 2, 2
443 ; CHECK-FISL: xxsel 32, 38, 39, 32
444 ; CHECK-FISL: vor 2, 0, 0
447 ; CHECK-LE-LABEL: @test20
448 ; CHECK-LE: vcmpequw {{[0-9]+}}, 4, 5
449 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
453 define <4 x float> @test21(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
455 %m = fcmp oeq <4 x float> %c, %d
456 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b
459 ; CHECK-REG-LABEL: @test21
460 ; CHECK-REG: xvcmpeqsp [[V1:[0-9]+]], 36, 37
461 ; CHECK-REG: xxsel 34, 35, 34, [[V1]]
464 ; CHECK-FISL-LABEL: @test21
465 ; CHECK-FISL: vor 0, 5, 5
466 ; CHECK-FISL: vor 1, 4, 4
467 ; CHECK-FISL: vor 6, 3, 3
468 ; CHECK-FISL: vor 7, 2, 2
469 ; CHECK-FISL: xvcmpeqsp 32, 33, 32
470 ; CHECK-FISL: xxsel 32, 38, 39, 32
471 ; CHECK-FISL: vor 2, 0, 0
474 ; CHECK-LE-LABEL: @test21
475 ; CHECK-LE: xvcmpeqsp [[V1:[0-9]+]], 36, 37
476 ; CHECK-LE: xxsel 34, 35, 34, [[V1]]
480 define <4 x float> @test22(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
482 %m = fcmp ueq <4 x float> %c, %d
483 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b
486 ; CHECK-REG-LABEL: @test22
487 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 37, 37
488 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 36, 36
489 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 36, 37
490 ; CHECK-REG-DAG: xxlnor
491 ; CHECK-REG-DAG: xxlnor
492 ; CHECK-REG-DAG: xxlor
493 ; CHECK-REG-DAG: xxlor
494 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
497 ; CHECK-FISL-LABEL: @test22
498 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 33, 32
499 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 32, 32
500 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 33, 33
501 ; CHECK-FISL-DAG: xxlnor
502 ; CHECK-FISL-DAG: xxlnor
503 ; CHECK-FISL-DAG: xxlor
504 ; CHECK-FISL-DAG: xxlor
505 ; CHECK-FISL: xxsel 0, 38, 39, {{[0-9]+}}
508 ; CHECK-LE-LABEL: @test22
509 ; CHECK-LE-DAG: xvcmpeqsp {{[0-9]+}}, 37, 37
510 ; CHECK-LE-DAG: xvcmpeqsp {{[0-9]+}}, 36, 36
511 ; CHECK-LE-DAG: xvcmpeqsp {{[0-9]+}}, 36, 37
512 ; CHECK-LE-DAG: xxlnor
513 ; CHECK-LE-DAG: xxlnor
514 ; CHECK-LE-DAG: xxlor
515 ; CHECK-LE-DAG: xxlor
516 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
520 define <8 x i16> @test23(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, <8 x i16> %d) {
522 %m = icmp eq <8 x i16> %c, %d
523 %v = select <8 x i1> %m, <8 x i16> %a, <8 x i16> %b
526 ; CHECK-REG-LABEL: @test23
527 ; CHECK-REG: vcmpequh {{[0-9]+}}, 4, 5
528 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
531 ; CHECK-FISL-LABEL: @test23
532 ; CHECK-FISL: vcmpequh 4, 4, 5
533 ; CHECK-FISL: vor 0, 3, 3
534 ; CHECK-FISL: vor 1, 2, 2
535 ; CHECK-FISL: vor 6, 4, 4
536 ; CHECK-FISL: xxsel 32, 32, 33, 38
537 ; CHECK-FISL: vor 2, 0,
540 ; CHECK-LE-LABEL: @test23
541 ; CHECK-LE: vcmpequh {{[0-9]+}}, 4, 5
542 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
546 define <16 x i8> @test24(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
548 %m = icmp eq <16 x i8> %c, %d
549 %v = select <16 x i1> %m, <16 x i8> %a, <16 x i8> %b
552 ; CHECK-REG-LABEL: @test24
553 ; CHECK-REG: vcmpequb {{[0-9]+}}, 4, 5
554 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
557 ; CHECK-FISL-LABEL: @test24
558 ; CHECK-FISL: vcmpequb 4, 4, 5
559 ; CHECK-FISL: vor 0, 3, 3
560 ; CHECK-FISL: vor 1, 2, 2
561 ; CHECK-FISL: vor 6, 4, 4
562 ; CHECK-FISL: xxsel 32, 32, 33, 38
563 ; CHECK-FISL: vor 2, 0, 0
566 ; CHECK-LE-LABEL: @test24
567 ; CHECK-LE: vcmpequb {{[0-9]+}}, 4, 5
568 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
572 define <2 x double> @test25(<2 x double> %a, <2 x double> %b, <2 x double> %c, <2 x double> %d) {
574 %m = fcmp oeq <2 x double> %c, %d
575 %v = select <2 x i1> %m, <2 x double> %a, <2 x double> %b
578 ; CHECK-LABEL: @test25
579 ; CHECK: xvcmpeqdp [[V1:[0-9]+]], 36, 37
580 ; CHECK: xxsel 34, 35, 34, [[V1]]
583 ; CHECK-LE-LABEL: @test25
584 ; CHECK-LE: xvcmpeqdp [[V1:[0-9]+]], 36, 37
585 ; CHECK-LE: xxsel 34, 35, 34, [[V1]]
589 define <2 x i64> @test26(<2 x i64> %a, <2 x i64> %b) {
590 %v = add <2 x i64> %a, %b
593 ; CHECK-LABEL: @test26
595 ; Make sure we use only two stores (one for each operand).
600 ; FIXME: The code quality here is not good; just make sure we do something for now.
605 ; CHECK-LE: vaddudm 2, 2, 3
609 define <2 x i64> @test27(<2 x i64> %a, <2 x i64> %b) {
610 %v = and <2 x i64> %a, %b
613 ; CHECK-LABEL: @test27
614 ; CHECK: xxland 34, 34, 35
617 ; CHECK-LE-LABEL: @test27
618 ; CHECK-LE: xxland 34, 34, 35
622 define <2 x double> @test28(<2 x double>* %a) {
623 %v = load <2 x double>, <2 x double>* %a, align 16
626 ; CHECK-LABEL: @test28
627 ; CHECK: lxvd2x 34, 0, 3
630 ; CHECK-LE-LABEL: @test28
631 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
632 ; CHECK-LE: xxswapd 34, [[V1]]
636 define void @test29(<2 x double>* %a, <2 x double> %b) {
637 store <2 x double> %b, <2 x double>* %a, align 16
640 ; CHECK-LABEL: @test29
641 ; CHECK: stxvd2x 34, 0, 3
644 ; CHECK-LE-LABEL: @test29
645 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
646 ; CHECK-LE: stxvd2x [[V1]], 0, 3
650 define <2 x double> @test28u(<2 x double>* %a) {
651 %v = load <2 x double>, <2 x double>* %a, align 8
654 ; CHECK-LABEL: @test28u
655 ; CHECK: lxvd2x 34, 0, 3
658 ; CHECK-LE-LABEL: @test28u
659 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
660 ; CHECK-LE: xxswapd 34, [[V1]]
664 define void @test29u(<2 x double>* %a, <2 x double> %b) {
665 store <2 x double> %b, <2 x double>* %a, align 8
668 ; CHECK-LABEL: @test29u
669 ; CHECK: stxvd2x 34, 0, 3
672 ; CHECK-LE-LABEL: @test29u
673 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
674 ; CHECK-LE: stxvd2x [[V1]], 0, 3
678 define <2 x i64> @test30(<2 x i64>* %a) {
679 %v = load <2 x i64>, <2 x i64>* %a, align 16
682 ; CHECK-REG-LABEL: @test30
683 ; CHECK-REG: lxvd2x 34, 0, 3
686 ; CHECK-FISL-LABEL: @test30
687 ; CHECK-FISL: lxvd2x 0, 0, 3
688 ; CHECK-FISL: xxlor 34, 0, 0
689 ; CHECK-FISL: vor 3, 2, 2
690 ; CHECK-FISL: vor 2, 3, 3
693 ; CHECK-LE-LABEL: @test30
694 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
695 ; CHECK-LE: xxswapd 34, [[V1]]
699 define void @test31(<2 x i64>* %a, <2 x i64> %b) {
700 store <2 x i64> %b, <2 x i64>* %a, align 16
703 ; CHECK-LABEL: @test31
704 ; CHECK: stxvd2x 34, 0, 3
707 ; CHECK-LE-LABEL: @test31
708 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
709 ; CHECK-LE: stxvd2x [[V1]], 0, 3
713 define <4 x float> @test32(<4 x float>* %a) {
714 %v = load <4 x float>, <4 x float>* %a, align 16
717 ; CHECK-REG-LABEL: @test32
718 ; CHECK-REG: lxvw4x 34, 0, 3
721 ; CHECK-FISL-LABEL: @test32
722 ; CHECK-FISL: lxvw4x 0, 0, 3
723 ; CHECK-FISL: xxlor 34, 0, 0
726 ; CHECK-LE-LABEL: @test32
727 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
728 ; CHECK-LE: xxswapd 34, [[V1]]
732 define void @test33(<4 x float>* %a, <4 x float> %b) {
733 store <4 x float> %b, <4 x float>* %a, align 16
736 ; CHECK-REG-LABEL: @test33
737 ; CHECK-REG: stxvw4x 34, 0, 3
740 ; CHECK-FISL-LABEL: @test33
741 ; CHECK-FISL: vor 3, 2, 2
742 ; CHECK-FISL: stxvw4x 35, 0, 3
745 ; CHECK-LE-LABEL: @test33
746 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
747 ; CHECK-LE: stxvd2x [[V1]], 0, 3
751 define <4 x float> @test32u(<4 x float>* %a) {
752 %v = load <4 x float>, <4 x float>* %a, align 8
755 ; CHECK-LABEL: @test32u
762 ; CHECK-LE-LABEL: @test32u
763 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
764 ; CHECK-LE: xxswapd 34, [[V1]]
768 define void @test33u(<4 x float>* %a, <4 x float> %b) {
769 store <4 x float> %b, <4 x float>* %a, align 8
772 ; CHECK-REG-LABEL: @test33u
773 ; CHECK-REG: stxvw4x 34, 0, 3
776 ; CHECK-FISL-LABEL: @test33u
777 ; CHECK-FISL: vor 3, 2, 2
778 ; CHECK-FISL: stxvw4x 35, 0, 3
781 ; CHECK-LE-LABEL: @test33u
782 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
783 ; CHECK-LE: stxvd2x [[V1]], 0, 3
787 define <4 x i32> @test34(<4 x i32>* %a) {
788 %v = load <4 x i32>, <4 x i32>* %a, align 16
791 ; CHECK-REG-LABEL: @test34
792 ; CHECK-REG: lxvw4x 34, 0, 3
795 ; CHECK-FISL-LABEL: @test34
796 ; CHECK-FISL: lxvw4x 0, 0, 3
797 ; CHECK-FISL: xxlor 34, 0, 0
800 ; CHECK-LE-LABEL: @test34
801 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
802 ; CHECK-LE: xxswapd 34, [[V1]]
806 define void @test35(<4 x i32>* %a, <4 x i32> %b) {
807 store <4 x i32> %b, <4 x i32>* %a, align 16
810 ; CHECK-REG-LABEL: @test35
811 ; CHECK-REG: stxvw4x 34, 0, 3
814 ; CHECK-FISL-LABEL: @test35
815 ; CHECK-FISL: vor 3, 2, 2
816 ; CHECK-FISL: stxvw4x 35, 0, 3
819 ; CHECK-LE-LABEL: @test35
820 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
821 ; CHECK-LE: stxvd2x [[V1]], 0, 3
825 define <2 x double> @test40(<2 x i64> %a) {
826 %v = uitofp <2 x i64> %a to <2 x double>
829 ; CHECK-LABEL: @test40
830 ; CHECK: xvcvuxddp 34, 34
833 ; CHECK-LE-LABEL: @test40
834 ; CHECK-LE: xvcvuxddp 34, 34
838 define <2 x double> @test41(<2 x i64> %a) {
839 %v = sitofp <2 x i64> %a to <2 x double>
842 ; CHECK-LABEL: @test41
843 ; CHECK: xvcvsxddp 34, 34
846 ; CHECK-LE-LABEL: @test41
847 ; CHECK-LE: xvcvsxddp 34, 34
851 define <2 x i64> @test42(<2 x double> %a) {
852 %v = fptoui <2 x double> %a to <2 x i64>
855 ; CHECK-LABEL: @test42
856 ; CHECK: xvcvdpuxds 34, 34
859 ; CHECK-LE-LABEL: @test42
860 ; CHECK-LE: xvcvdpuxds 34, 34
864 define <2 x i64> @test43(<2 x double> %a) {
865 %v = fptosi <2 x double> %a to <2 x i64>
868 ; CHECK-LABEL: @test43
869 ; CHECK: xvcvdpsxds 34, 34
872 ; CHECK-LE-LABEL: @test43
873 ; CHECK-LE: xvcvdpsxds 34, 34
877 define <2 x float> @test44(<2 x i64> %a) {
878 %v = uitofp <2 x i64> %a to <2 x float>
881 ; CHECK-LABEL: @test44
882 ; FIXME: The code quality here looks pretty bad.
886 define <2 x float> @test45(<2 x i64> %a) {
887 %v = sitofp <2 x i64> %a to <2 x float>
890 ; CHECK-LABEL: @test45
891 ; FIXME: The code quality here looks pretty bad.
895 define <2 x i64> @test46(<2 x float> %a) {
896 %v = fptoui <2 x float> %a to <2 x i64>
899 ; CHECK-LABEL: @test46
900 ; FIXME: The code quality here looks pretty bad.
904 define <2 x i64> @test47(<2 x float> %a) {
905 %v = fptosi <2 x float> %a to <2 x i64>
908 ; CHECK-LABEL: @test47
909 ; FIXME: The code quality here looks pretty bad.
913 define <2 x double> @test50(double* %a) {
914 %v = load double, double* %a, align 8
915 %w = insertelement <2 x double> undef, double %v, i32 0
916 %x = insertelement <2 x double> %w, double %v, i32 1
919 ; CHECK-LABEL: @test50
920 ; CHECK: lxvdsx 34, 0, 3
923 ; CHECK-LE-LABEL: @test50
924 ; CHECK-LE: lxvdsx 34, 0, 3
928 define <2 x double> @test51(<2 x double> %a, <2 x double> %b) {
929 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
932 ; CHECK-LABEL: @test51
933 ; CHECK: xxspltd 34, 34, 0
936 ; CHECK-LE-LABEL: @test51
937 ; CHECK-LE: xxspltd 34, 34, 1
941 define <2 x double> @test52(<2 x double> %a, <2 x double> %b) {
942 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
945 ; CHECK-LABEL: @test52
946 ; CHECK: xxmrghd 34, 34, 35
949 ; CHECK-LE-LABEL: @test52
950 ; CHECK-LE: xxmrgld 34, 35, 34
954 define <2 x double> @test53(<2 x double> %a, <2 x double> %b) {
955 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 0>
958 ; CHECK-LABEL: @test53
959 ; CHECK: xxmrghd 34, 35, 34
962 ; CHECK-LE-LABEL: @test53
963 ; CHECK-LE: xxmrgld 34, 34, 35
967 define <2 x double> @test54(<2 x double> %a, <2 x double> %b) {
968 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2>
971 ; CHECK-LABEL: @test54
972 ; CHECK: xxpermdi 34, 34, 35, 2
975 ; CHECK-LE-LABEL: @test54
976 ; CHECK-LE: xxpermdi 34, 35, 34, 2
980 define <2 x double> @test55(<2 x double> %a, <2 x double> %b) {
981 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
984 ; CHECK-LABEL: @test55
985 ; CHECK: xxmrgld 34, 34, 35
988 ; CHECK-LE-LABEL: @test55
989 ; CHECK-LE: xxmrghd 34, 35, 34
993 define <2 x i64> @test56(<2 x i64> %a, <2 x i64> %b) {
994 %v = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
997 ; CHECK-LABEL: @test56
998 ; CHECK: xxmrgld 34, 34, 35
1001 ; CHECK-LE-LABEL: @test56
1002 ; CHECK-LE: xxmrghd 34, 35, 34
1006 define <2 x i64> @test60(<2 x i64> %a, <2 x i64> %b) {
1007 %v = shl <2 x i64> %a, %b
1010 ; CHECK-LABEL: @test60
1011 ; This should scalarize, and the current code quality is not good.
1020 define <2 x i64> @test61(<2 x i64> %a, <2 x i64> %b) {
1021 %v = lshr <2 x i64> %a, %b
1024 ; CHECK-LABEL: @test61
1025 ; This should scalarize, and the current code quality is not good.
1034 define <2 x i64> @test62(<2 x i64> %a, <2 x i64> %b) {
1035 %v = ashr <2 x i64> %a, %b
1038 ; CHECK-LABEL: @test62
1039 ; This should scalarize, and the current code quality is not good.
1048 define double @test63(<2 x double> %a) {
1049 %v = extractelement <2 x double> %a, i32 0
1052 ; CHECK-REG-LABEL: @test63
1053 ; CHECK-REG: xxlor 1, 34, 34
1056 ; CHECK-FISL-LABEL: @test63
1057 ; CHECK-FISL: xxlor 0, 34, 34
1058 ; CHECK-FISL: fmr 1, 0
1061 ; CHECK-LE-LABEL: @test63
1062 ; CHECK-LE: xxswapd 1, 34
1066 define double @test64(<2 x double> %a) {
1067 %v = extractelement <2 x double> %a, i32 1
1070 ; CHECK-REG-LABEL: @test64
1071 ; CHECK-REG: xxswapd 1, 34
1074 ; CHECK-FISL-LABEL: @test64
1075 ; CHECK-FISL: xxswapd 34, 34
1076 ; CHECK-FISL: xxlor 0, 34, 34
1077 ; CHECK-FISL: fmr 1, 0
1080 ; CHECK-LE-LABEL: @test64
1081 ; CHECK-LE: xxlor 1, 34, 34
1084 define <2 x i1> @test65(<2 x i64> %a, <2 x i64> %b) {
1085 %w = icmp eq <2 x i64> %a, %b
1088 ; CHECK-REG-LABEL: @test65
1089 ; CHECK-REG: vcmpequw 2, 2, 3
1092 ; CHECK-FISL-LABEL: @test65
1093 ; CHECK-FISL: vor 4, 3, 3
1094 ; CHECK-FISL: vor 5, 2, 2
1095 ; CHECK-FISL: vcmpequw 4, 5, 4
1096 ; CHECK-FISL: vor 2, 4, 4
1099 ; CHECK-LE-LABEL: @test65
1100 ; CHECK-LE: vcmpequd 2, 2, 3
1104 define <2 x i1> @test66(<2 x i64> %a, <2 x i64> %b) {
1105 %w = icmp ne <2 x i64> %a, %b
1108 ; CHECK-REG-LABEL: @test66
1109 ; CHECK-REG: vcmpequw {{[0-9]+}}, 2, 3
1110 ; CHECK-REG: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
1113 ; CHECK-FISL-LABEL: @test66
1114 ; CHECK-FISL: vcmpequw {{[0-9]+}}, 5, 4
1115 ; CHECK-FISL: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
1118 ; CHECK-LE-LABEL: @test66
1119 ; CHECK-LE: vcmpequd {{[0-9]+}}, 2, 3
1120 ; CHECK-LE: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
1124 define <2 x i1> @test67(<2 x i64> %a, <2 x i64> %b) {
1125 %w = icmp ult <2 x i64> %a, %b
1128 ; CHECK-LABEL: @test67
1129 ; This should scalarize, and the current code quality is not good.
1137 ; CHECK-LE-LABEL: @test67
1138 ; CHECK-LE: vcmpgtud 2, 3, 2
1142 define <2 x double> @test68(<2 x i32> %a) {
1143 %w = sitofp <2 x i32> %a to <2 x double>
1146 ; CHECK-LABEL: @test68
1147 ; CHECK: xxsldwi [[V1:[0-9]+]], 34, 34, 1
1148 ; CHECK: xvcvsxwdp 34, [[V1]]
1151 ; CHECK-LE-LABEL: @test68
1152 ; CHECK-LE: xxsldwi [[V1:[0-9]+]], 34, 34, 1
1153 ; CHECK-LE: xvcvsxwdp 34, [[V1]]
1157 define <2 x double> @test69(<2 x i16> %a) {
1158 %w = sitofp <2 x i16> %a to <2 x double>
1161 ; CHECK-LABEL: @test69
1162 ; CHECK: vspltisw [[V1:[0-9]+]], 8
1163 ; CHECK: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1164 ; CHECK: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1165 ; CHECK: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1166 ; CHECK: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1167 ; CHECK: xvcvsxwdp 34, [[V4]]
1170 ; CHECK-LE-LABEL: @test69
1171 ; CHECK-LE: vspltisw [[V1:[0-9]+]], 8
1172 ; CHECK-LE: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1173 ; CHECK-LE: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1174 ; CHECK-LE: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1175 ; CHECK-LE: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1176 ; CHECK-LE: xvcvsxwdp 34, [[V4]]
1180 define <2 x double> @test70(<2 x i8> %a) {
1181 %w = sitofp <2 x i8> %a to <2 x double>
1184 ; CHECK-LABEL: @test70
1185 ; CHECK: vspltisw [[V1:[0-9]+]], 12
1186 ; CHECK: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1187 ; CHECK: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1188 ; CHECK: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1189 ; CHECK: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1190 ; CHECK: xvcvsxwdp 34, [[V4]]
1193 ; CHECK-LE-LABEL: @test70
1194 ; CHECK-LE: vspltisw [[V1:[0-9]+]], 12
1195 ; CHECK-LE: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1196 ; CHECK-LE: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1197 ; CHECK-LE: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1198 ; CHECK-LE: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1199 ; CHECK-LE: xvcvsxwdp 34, [[V4]]
1203 define <2 x i32> @test80(i32 %v) {
1204 %b1 = insertelement <2 x i32> undef, i32 %v, i32 0
1205 %b2 = shufflevector <2 x i32> %b1, <2 x i32> undef, <2 x i32> zeroinitializer
1206 %i = add <2 x i32> %b2, <i32 2, i32 3>
1209 ; CHECK-REG-LABEL: @test80
1210 ; CHECK-REG-DAG: addi [[R1:[0-9]+]], 3, 3
1211 ; CHECK-REG-DAG: addi [[R2:[0-9]+]], 1, -16
1212 ; CHECK-REG-DAG: addi [[R3:[0-9]+]], 3, 2
1213 ; CHECK-REG: std [[R1]], -8(1)
1214 ; CHECK-REG: std [[R3]], -16(1)
1215 ; CHECK-REG: lxvd2x 34, 0, [[R2]]
1216 ; CHECK-REG-NOT: stxvd2x
1219 ; CHECK-FISL-LABEL: @test80
1220 ; CHECK-FISL-DAG: addi [[R1:[0-9]+]], 3, 3
1221 ; CHECK-FISL-DAG: addi [[R2:[0-9]+]], 1, -16
1222 ; CHECK-FISL-DAG: addi [[R3:[0-9]+]], 3, 2
1223 ; CHECK-FISL-DAG: std [[R1]], -8(1)
1224 ; CHECK-FISL-DAG: std [[R3]], -16(1)
1225 ; CHECK-FISL-DAG: lxvd2x 0, 0, [[R2]]
1228 ; CHECK-LE-LABEL: @test80
1229 ; CHECK-LE-DAG: mtvsrd [[R1:[0-9]+]], 3
1230 ; CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI
1231 ; CHECK-LE-DAG: xxswapd [[V1:[0-9]+]], [[R1]]
1232 ; CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]]
1233 ; CHECK-LE-DAG: xxspltd 34, [[V1]]
1234 ; CHECK-LE-DAG: xxswapd 35, [[V2]]
1235 ; CHECK-LE: vaddudm 2, 2, 3
1239 define <2 x double> @test81(<4 x float> %b) {
1240 %w = bitcast <4 x float> %b to <2 x double>
1243 ; CHECK-LABEL: @test81
1246 ; CHECK-LE-LABEL: @test81
1250 define double @test82(double %a, double %b, double %c, double %d) {
1252 %m = fcmp oeq double %c, %d
1253 %v = select i1 %m, double %a, double %b
1256 ; CHECK-REG-LABEL: @test82
1257 ; CHECK-REG: xscmpudp [[REG:[0-9]+]], 3, 4
1258 ; CHECK-REG: beqlr [[REG]]
1260 ; CHECK-FISL-LABEL: @test82
1261 ; CHECK-FISL: xscmpudp [[REG:[0-9]+]], 3, 4
1262 ; CHECK-FISL: beq [[REG]], {{.*}}
1264 ; CHECK-LE-LABEL: @test82
1265 ; CHECK-LE: xscmpudp [[REG:[0-9]+]], 3, 4
1266 ; CHECK-LE: beqlr [[REG]]